SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
EPI Read FIFO (EPIREADFIFO0), offset 0x070
EPI Read FIFO Alias 1 (EPIREADFIFO1), offset 0x074
EPI Read FIFO Alias 2 (EPIREADFIFO2), offset 0x078
EPI Read FIFO Alias 3 (EPIREADFIFO3), offset 0x07C
EPI Read FIFO Alias 4 (EPIREADFIFO4), offset 0x080
EPI Read FIFO Alias 5 (EPIREADFIFO5), offset 0x084
EPI Read FIFO Alias 6 (EPIREADFIFO6), offset 0x088
EPI Read FIFO Alias 7 (EPIREADFIFO7), offset 0x08C
This register returns the contents of the NBRFIFO or 0 if the NBRFIFO is empty. Each read returns the data that is at the top of the NBRFIFO, and then empties that value from the NBRFIFO. The alias registers can be used with the LDMIA instruction for more efficient operation (for up to 8 registers). See Cortex-M3/M4 Instruction Set Technical User's Manual (literature number SPMU159) for more information on the LDMIA instruction.
EPIREADFIFOn is shown in Figure 16-45 and described in Table 16-29.
Return to Summary Table.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| DATA | |||||||||||||||||||||||||||||||
| R-X | |||||||||||||||||||||||||||||||