SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
EPI Write FIFO Count (EPIWFIFOCNT)
This register contains the number of slots currently available in the WFIFO. This register may be used for polled writes to avoid stalling and for blocking reads to avoid excess stalling (due to undrained writes). An example use for writes may be:
for (idx = 0; idx < cnt; idx++) { while (EPIWFIFOCNT == 0) ; *ext_ram = *mydata++; }
The above code ensures that writes to the address mapped location do not occur unless the WFIFO has room. Although polling makes the code wait (spinning in the loop), it does not prevent interrupts being serviced due to bus stalling.
EPIWFIFOCNT is shown in Figure 16-47 and described in Table 16-31.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||||||||||
| R-0x0 | |||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | WTAV | ||||||||||||||
| R-0x0 | R-0x4 | ||||||||||||||