9.4.1.1 Global Initialization
The following list describes the requirements for initializing the AES and surrounding modules when the AES is used for the first time after a device reset.
- When reset has completed, enable the AES by setting the R0 bit in the CRC and Cryptographic Modules Run Mode Clock Gating Control (RCGCCCM), System Control offset 0x674. When the R0 bit is set in the CRC and Cryptographic Modules Peripheral Ready (PRCCM), System Control offset 0xA74 register, the AES is powered and ready to be configured.
- Configure the AES µDMA channels for Context In, Context Out, Data In, and/or Data Out by programming the appropriate encoding value in the DMA Channel Map Select n (DMACHMAPn) register in the µDMA module, offset 0x510. For more information on how to program channel assignments as well as enabling burst and the configured channels, refer to Section 8.
- Execute a software reset by setting the SOFTRESET bit in the AES_SYSCONFIG register. When reset is complete, the RESETDONE bit reads as 1 in the AES_SYSSTATUS register.
- If the AES channels are configured in the µDMA, enable the required AES DMA requests by programming bits [9:5] of the AES_SYSCONFIG register, in addition to the completion interrupts in the AES DMA Interrupt Mask (AES_DMAIM) register, CCM offset 0x020.
- Specify the size of the keys by programming the KEY_SIZE bit field in the AES_CTRL register.
- Load AES Key 1 (AES_KEY1_n) register.
- Load AES Key 2 (AES_KEY2_n) register if it is used by the configuration mode. See Table 9-7 for information regarding which configuration modes require a load to this register.
- Configure the AES for the appropriate encryption or decryption mode (see Section 9.4.1.2.1 to Section 9.4.1.2.10).
- Select encryption or decryption by programming the DIRECTION bit in the AES Control (AES_CTRL) register, offset 0x050.