SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
GPIO Interrupt Both Edges (GPIOIBE)
The GPIOIBE register allows both edges to cause interrupts. When the corresponding bit in the GPIO Interrupt Sense (GPIOIS) register (see Section 17.5.3) is set to detect edges, setting a bit in the GPIOIBE register configures the corresponding pin to detect both rising and falling edges, regardless of the corresponding bit in the GPIO Interrupt Event (GPIOIEV) register (see Section 17.5.5). Clearing a bit configures the pin to be controlled by the GPIOIEV register. All bits are cleared by a reset.
NOTE
To prevent false interrupts, the following steps should be taken when re-configuring GPIO edge and interrupt sense registers:
GPIOIBE is shown in Figure 17-8 and described in Table 17-10.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | IBE | ||||||||||||||||||||||||||||||
| R-0x0 | R/W-0x0 | ||||||||||||||||||||||||||||||