SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
GPIO Wake Pin Enable (GPIOWAKEPEN)
This register is used to configure K[7:4] as a wake enable source for the hibernation module. The wake level must be programmed in the GPIOWAKELVL register at offset 0x544. In order for this register configuration to become implemented, the WUUNLK bit needs to be set in the HIBIO register at offset 0x02C in the hibernation module.
NOTE
This register is only available on Port K.
GPIOWAKEPEN is shown in Figure 17-31 and described in Table 17-38.
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31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 |
RESERVED | |||||||
R-0x0 | |||||||
23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
RESERVED | |||||||
R-0x0 | |||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | |||||||
R-0x0 | |||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
WAKEP7 | WAKEP6 | WAKEP5 | WAKEP4 | RESERVED | |||
R/W-0x0 | R/W-0x0 | R/W-0x0 | R/W-0x0 | R-0x0 | |||