17.5.29 GPIOWAKESTAT Register (Offset = 0x548) [reset = 0x0]
GPIO Wake Status (GPIOWAKESTAT)
This register indicates the GPIO wake event status. If a register bit has been set for K[7:4], a wake event signal has been sent to the Hibernate module.
NOTE
This register is only available on Port K.
GPIOWAKESTAT is shown in Figure 17-33 and described in Table 17-40.
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Figure 17-33 GPIOWAKESTAT Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
| RESERVED |
| R-0x0 |
|
| 23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
| RESERVED |
| R-0x0 |
|
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| STAT7 |
STAT6 |
STAT5 |
STAT4 |
RESERVED |
| R-0x0 |
R-0x0 |
R-0x0 |
R-0x0 |
R-0x0 |
|
Table 17-40 GPIOWAKESTAT Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-8 |
RESERVED |
R |
0x0 |
|
| 7 |
STAT7 |
R |
0x0 |
K[7] Wake Status. This is for future use.
0x0 = Pin is not wake-up source
0x1 = Pin wake event asserted to hibernate module
|
| 6 |
STAT6 |
R |
0x0 |
K[6] Wake Status. This is for future use.
0x0 = Pin is not wake-up source
0x1 = Pin wake event asserted to hibernate module
|
| 5 |
STAT5 |
R |
0x0 |
K[5] Wake Status. This is for future use.
0x0 = Pin is not wake-up source
0x1 = Pin wake event asserted to hibernate module
|
| 4 |
STAT4 |
R |
0x0 |
K[4] Wake Status.
0x0 = Pin is not wake-up source
0x1 = Pin wake event asserted to hibernate module
|
| 3-0 |
RESERVED |
R |
0x0 |
|