| 31-20 |
RESERVED |
R |
0x0 |
|
| 19 |
INTFAULT3 |
R |
0x0 |
Interrupt Fault PWM 3. If the LATCH bit is set in the PWM3CTL register, the INTFAULT3 bit in this register can be cleared by writing a 1 to the INTFAULT3 bit in the PWMISC register. If the LATCH bit is 0 in the PWM3CTL register, writing a 1 to the INTFAULT3 bit in the PWMISC register has no effect.
0x0 = The fault condition for PWM generator 3 has not been asserted.
0x1 = The fault condition for PWM generator 3 is asserted.
|
| 18 |
INTFAULT2 |
R |
0x0 |
Interrupt Fault PWM 2. If the LATCH bit is set in the PWM2CTL register, the INTFAULT2 bit in this register can be cleared by writing a 1 to the INTFAULT2 bit in the PWMISC register. If the LATCH bit is 0 in the PWM2CTL register, writing a 1 to the INTFAULT2 bit in the PWMISC register has no effect.
0x0 = The fault condition for PWM generator 2 has not been asserted.
0x1 = The fault condition for PWM generator 2 is asserted.
|
| 17 |
INTFAULT1 |
R |
0x0 |
Interrupt Fault PWM 1. If the LATCH bit is set in the PWM1CTL register, the INTFAULT1 bit in this register can be cleared by writing a 1 to the INTFAULT1 bit in the PWMISC register. If the LATCH bit is 0 in the PWM1CTL register, writing a 1 to the INTFAULT1 bit in the PWMISC register has no effect.
0x0 = The fault condition for PWM generator 1 has not been asserted.
0x1 = The fault condition for PWM generator 1 is asserted.
|
| 16 |
INTFAULT0 |
R |
0x0 |
Interrupt Fault PWM 0. If the LATCH bit is set in the PWM0CTL register, the INTFAULT0 bit in this register can be cleared by writing a 1 to the INTFAULT0 bit in the PWMISC register. If the LATCH bit is 0 in the PWM0CTL register, writing a 1 to the INTFAULT0 bit in the PWMISC register has no effect.
0x0 = The fault condition for PWM generator 0 has not been asserted.
0x1 = The fault condition for PWM generator 0 is asserted.
|
| 15-4 |
RESERVED |
R |
0x0 |
|
| 3 |
INTPWM3 |
R |
0x0 |
PWM3 Interrupt Asserted. The PWM3RIS register shows the source of this interrupt. This bit is cleared by writing a 1 to the corresponding bit in the PWM3ISC register.
0x0 = The PWM generator 3 block interrupt has not been asserted.
0x1 = The PWM generator 3 block interrupt is asserted.
|
| 2 |
INTPWM2 |
R |
0x0 |
PWM2 Interrupt Asserted. The PWM2RIS register shows the source of this interrupt. This bit is cleared by writing a 1 to the corresponding bit in the PWM2ISC register.
0x0 = The PWM generator 2 block interrupt has not been asserted.
0x1 = The PWM generator 2 block interrupt is asserted.
|
| 1 |
INTPWM1 |
R |
0x0 |
PWM1 Interrupt Asserted. The PWM1RIS register shows the source of this interrupt. This bit is cleared by writing a 1 to the corresponding bit in the PWM1ISC register.
0x0 = The PWM generator 1 block interrupt has not been asserted.
0x1 = The PWM generator 1 block interrupt is asserted.
|
| 0 |
INTPWM0 |
R |
0x0 |
PWM0 Interrupt Asserted. The PWM0RIS register shows the source of this interrupt. This bit is cleared by writing a 1 to the corresponding bit in the PWM0ISC register.
0x0 = The PWM generator 0 block interrupt has not been asserted.
0x1 = The PWM generator 0 block interrupt is asserted.
|