SLLSEY7F June   2017  – April 2020

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.          Application Diagram
      2.      ISO121x Devices Reduce Board Temperatures vs Traditional Solutions
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
    2.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics—DC Specification
    10. 6.10 Switching Characteristics—AC Specification
    11. 6.11 Insulation Characteristics Curves
    12. 6.12 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Sinking Inputs
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Setting Current Limit and Voltage Thresholds
          2. 9.2.1.2.2 Thermal Considerations
          3. 9.2.1.2.3 Designing for 48-V Systems
          4. 9.2.1.2.4 Designing for Input Voltages Greater Than 60 V
          5. 9.2.1.2.5 Surge, ESD, and EFT Tests
          6. 9.2.1.2.6 Multiplexing the Interface to the Host Controller
          7. 9.2.1.2.7 Status LEDs
        3. 9.2.1.3 Application Curve
      2. 9.2.2 Sourcing Inputs
      3. 9.2.3 Sourcing and Sinking Inputs (Bidirectional Inputs)
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Development Support
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resource
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

6.10 Switching Characteristics—AC Specification

(Over recommended operating conditions unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tr, tf Output signal rise and fall time, OUTx pins Input rise and fall times = 10 ns, see Figure 10 3 ns
tPLH Propagation delay time for low to high transition Input rise and fall times = 10 ns, see Figure 10 110 140 ns
tPHL Propagation delay time for high to low transition Input rise and fall times = 10 ns, see Figure 10 10 15 ns
tsk(p) Pulse skew |tPHL - tPLH| Input rise and fall times = 10 ns, see Figure 10 102 130 ns
tUI Minimum pulse width Input rise and fall times = 125 ns, see Figure 10 150 ns
tPHZ Disable propagation delay, high-to-high impedance output See Figure 13 17 40 ns
tPLZ Disable propagation delay, low-to-high impedance output See Figure 12 17 40 ns
tPZH Enable propagation delay, high impedance-to-high output See Figure 13 3 8.5 µs
tPZL Enable propagation delay, high impedance-to-low output See Figure 12 17 40 ns
CMTI Common mode transient immunity See Figure 14 25 70 kV/µs
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