The designer should compare all SR MOSFET parameters for its optimum selection in a given application instead simply choosing the lowest R_DS(ON) MOSFET. The lower R_DS(ON) MOSFET usually has higher gate charge Q_g such that the driving losses could become a critical factor for both light load and full load efficiency at high frequency. It means, even though the lower R_DS(ON) MOSFET gives better efficiency at a heavy load, it might bring less efficiency at lighter load because of higher Q_g.

SR loss is the sum of conduction losses and switching losses.

Conduction losses are defined by the R_DS(ON) of the MOSFET and the forward voltage of the internal body diode, V_SD. The calculation for the loss caused by SR MOSFET channel conduction can be done with the following Equation 11 and Equation 4. Note that the current for calculation in Equation 4 is not output current and is the RMS current (I_RMS) flowing through the SR MOSFET.

To avoid a current shoot through, a dead time and interlock function need to be added. This causes the current to flow through the MOSFET body diode at the beginning of the SR conduction time(t_delay). The diode power loss can be calculated by using diode forward drop (V_F), body diode current (I_SD) , t_delay and switching frequency (f_sw).

Thus, the total conduction loss P_{TOTAL_CON} in SR MOSFETs is calculated as

Gate drive losses of the SR P_GATE are defined by the gate charge Q_g, the gate driving voltage V_gs, switching frequency f_sw and the number of the MOSFET in parallel N. This value can be estimated through Equation 9. The gate drive loss P_GATE is dissipated in the gate driver circuits, including the driver output impedances, the external gate resistor, and the SR MOSFET internal gate resistance, so P_DRV could be calculated as Equation 8.