SLVSAN6B February   2011  – September 2016

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Supply Voltage
      2. 8.3.2 Boost Regulator
      3. 8.3.3 Enable and Start-Up
      4. 8.3.4 Overcurrent, Overvoltage, and Short-Circuit Protection
      5. 8.3.5 IFB Pin Unused
    4. 8.4 Device Functional Modes
      1. 8.4.1 Current Program and PWM Dimming
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Audible Noise Reduction
        4. 9.2.2.4 Isolation MOSFET Selection
      3. 9.2.3 Application Curves
    3. 9.3 Additional Application Circuits
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device And Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

11 Layout

11.1 Layout Guidelines

As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor, C3 in the typical application circuit, needs not only to be close to the VBAT pin, but also to the GND pin in order to reduce the input ripple detected by the device. The input capacitor, C1 in Figure 9 , must be placed close to the inductor. The SW pin carries high current with fast rising and falling edges. Therefore, keep the connection between the pin to the inductor and Schottky as short and wide as possible. It is also beneficial to have the ground of the output capacitor C2 close to the PGND pin because there is large ground return current flowing between them. When laying out signal ground, TI recommends using short traces separated from power ground traces, connecting these short traces together at a single point, for example on the thermal pad.

Thermal pad must be soldered on to the PCB and connected to the GND pin of the TPS61181A device. Additional thermal via can significantly improve power dissipation of the device.

11.2 Layout Example

TPS61181A TPS61181A_layout.png Figure 24. TPS61181A Layout