SNLA404 December 2022 DP83TC811R-Q1 , DP83TC811S-Q1 , DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TG720R-Q1 , DP83TG720S-Q1
At this point in the sequence, the PHY should be configured and linked up with the link partner. Therefore, the PHY is ready to complete data transmission. However, periodically poll the link bit to verify that the link is still established. This bit is a latch low bit, indicating that if the PHY lost link at any point between polls, the lost link result is kept for a single register read.
Another periodic action the MCU takes post start-up is to check the quality of the link via the Signal Quality Indicator (SQI). Section 6 in the respective Open Alliance Configuration application note of the PHY has details on registers to read to extract the link health. If the SQI begins to drop from excellent to bad or good, corrective action can be taken depending on the application.