SNLA404 December 2022 DP83TC811R-Q1 , DP83TC811S-Q1 , DP83TC812R-Q1 , DP83TC812S-Q1 , DP83TG720R-Q1 , DP83TG720S-Q1
The PHY transitions to normal operation from the reset state. Depending on the method used to initiate reset, the PHY can sample the bootstraps. If this is the case, at TE (relative to T1), the PHY samples the bootstraps to determine initial modes in which to power up. Since a number of pins of the PHY are bootstrap pins, it is important that MCUs do not alter the voltages at this time or else the PHY does not sample properly. The desired voltages are set in hardware through a series of voltage divider circuits or internal pullup or pulldown resistors.
811 |
720 |
812 |
|
---|---|---|---|
TE (µs) |
0.7 |
2 |
40 |
An example is a MII pin which also functions as a strap pin. If the MAC were to begin sending packets during strapping, the pin is driven by the MCU instead of by the strap network; therefore, the PHY can sample an unintended voltage depending on where in the waveform the PHY begins to sample. This is more consequential in multilevel straps where the voltage ranges per mode are smaller. After sampling, the pins transition to their normal operation shortly after. MAC and MCU proper functions for these pins can occur after this transition.