SNLU288 December 2020
Table 2-7 shows the DS160PR412 and DS160PR421 EVM global controls that affect all devices on the board.
| COMPONENT | NAME | FUNCTION OR DESCRIPTION |
|---|---|---|
| J1 | DS160PR412-0 VCC | Pin 1 : Board VCC Pin 2: PR412_0 VCC |
| J2 | DS160PR412-1 VCC | Pin 1 : Board VCC Pin 2: PR412_1 VCC |
| J3 | DS160PR421-2 VCC | Pin 1 : Board VCC Pin 2: PR421_2 VCC |
| J4 | DS160PR421-3 VCC | Pin 1 : Board VCC Pin 2: PR421_3 VCC |
| J5 | PCIe JTAG TRST | 1-2: Edge Finger to PCIe-A 3-4 Edge Finger to PCIe A + B 5-6 Edge Finger to PCIe-B |
| J6 | PCIe JTAG TCK | 1-2: Edge Finger to PCIe-A 3-4 Edge Finger to PCIe A + B 5-6 Edge Finger to PCIe-B |
| J7 | PCIe TDI | 1-2: Edge Finger to PCIe-A 3-4 Edge Finger to PCIe A + B 5-6 Edge Finger to PCIe-B |
| J8 | PCIe TDO | 1-2: Edge Finger to PCIe-A 3-4 Edge Finger to PCIe A + B 5-6 Edge Finger to PCIe-B |
| J9 | PCIe TMS | Access point to the GND reference. |
| J10 | Board Regulator 3.3-V Output | Pin 1 : Board 3.3V Pin 2: GND |
J11 | Board 12-V Supply | Pin 1 : Board 12V Pin 2: GND |
JMP7 | MUX SEL | 1-2 : PCIe Edge Finger to PCIe-B 2-3: PCIe Edge Finger to PCIe-A |
JMP8 | Redriver PD | 1-2 : Power Down 2-3: Normal Operation |
JMP17 | I2C Interface Sel | 1-2 : USB2ANY 2-3: Aardvark |
JMP18 | CLK Buffer Enable | 1-2 : Disabled 2-3: Enabled |
JMP19 | CLK Buffer Input Sel | 1-2 : CLKIN1 2-3: CLKIN0 |
JMP20 | CLK Buffer Ref. Out | 1-2 : Enabled 2-3: Disabled |