SNOU186 September 2021 LM74720-Q1 , LM74722-Q1
Table 2-1 lists the LM7472EVM board input and output connector functionality. Table 2-2 and Table 2-3 describe the test points description and the jumper functionality of the EVM respectively.
Channel | Connector | Description |
---|---|---|
1 | J1 | Power input connector to the positive rail of the input power supply |
J5 | Ground connection for the power supply | |
J2 | Power output connector to the positive side of the load | |
J6 | Ground connection for the load | |
2 | J8 | Power input connector to the positive rail of the input power supply |
J12 | Ground connection for the power supply | |
J9 | Power output connector to the positive side of the load | |
J7 | Power output connector to the positive side after the optional LC filter at output | |
J13 | Ground connection for the load |
Test Point |
Name | Description |
---|---|---|
TP1 |
VIN1 | Input power supply to the EVM - channel 1 |
TP2 | VOUT1 | Output from the EVM - channel 1 |
TP3 | VIN_MON1 | Input monitoring for battery inputs - channel 1 |
TP6 | GATE1 | Output of Ideal Diode MOSFET Gate Control - channel 1 |
TP7 |
PD1 |
Output of Hot-Swap MOSFET Gate Control - channel 1 |
TP8 |
CAP1 |
Internal Boost Regulator output - channel 1 |
TP9 |
C1 |
Cathode pin - channel 1 |
TP10 | VIN2 | Input power supply to the EVM - channel 2 |
TP11 | VOUT2 | Output from the EVM - channel 2 |
TP12 | VIN_MON2 | Input monitoring for battery inputs - channel 2 |
TP15 | GATE2 | Output of Ideal Diode MOSFET Gate Control - channel 2 |
TP16 | PD2 | Output of Hot-Swap MOSFET Gate Control - channel 2 |
TP17 | CAP2 | Internal Boost Regulator output - channel 2 |
TP18 |
C2 |
Cathode pin - channel 2 |
TP4, TP5, TP13, TP14 | PGND | Test Point for EVM Ground |
Jumpers | Description |
---|---|
J4 | EN/UVLO control channel 1
|
J3 | Enables LED indication for output - channel 1 |
J11 | EN/UVLO control channel 2
|
J10 | Enables LED indication for output - channel 2 |