SNVU751 October   2020 LP875761-Q1

 

  1. 1Trademarks
  2. 2Overview
  3. 3Quick Setup Guide
    1. 3.1 Installing/Opening the Software
    2.     5
    3. 3.2 Power Supply Setup
    4. 3.3 Notes on Efficiency Measurement Procedure
  4. 4GUI Overview
    1. 4.1 Main Tab
    2. 4.2 Other Tabs and Menus
    3. 4.3 Console
  5. 5Bill of Materials
  6. 6Board Layout
  7. 7LP875761Q1EVM Schematics
  8. 8Revision History

Power Supply Setup

To power up the EVM, one power supply is needed. For full-load testing of the LP875761Q1EVM, a DC-power supply capable of at least 10 A and 5 V is required. 5 A is suggested as a practical minimum for partial load. The power supply is connected to the EVM using connector J4. The power supply and cabling must present low impedance to the UUT; the length of power supply cables must be minimized. Remote sense, using connector J8, can be used to compensate for voltage drop in the cabling.

With the power supply disconnected from the UUT, set the supply to 3.3 V or 5.0 V DC and the current limit to 5 A minimum. Set the power supply output OFF. Connect the power supply's positive terminal (+) to VIN and negative terminal (–) to GND on UUT (J4 power-in terminal block). Check that jumpers on the boards are set as shown in Figure 2-1 (factory default jumper configuration).

Set power supply output ON, and then continue with the following steps. Note that following steps are only an example. Register values, enable control, mode and multiphase status may differ depending on the LP875761Q1EVM configuration.

  1. On Evaluation software GUI, click on Assert NRST (see Figure 3-6).
  2. Click on either of the two Read Registers buttons. You should see ready message on green background next to the Read Registers button (see Figure 3-7).
  3. Check that Buck0 is enabled, checkbox is ticked (see Figure 3-8).
  4. Click on Assert EN1 (see Figure 3-9).
  5. Click on either of the two Read Registers buttons.
  6. In this example case the GUI indicates Disabled under Mode until EN1 is asserted. After EN1 is asserted Mode is changed to Enabled. In case BUCKx is enabled or disabled with bit instead of ENx pin, the Mode can be checked by reading registers. GUI indicates also Master under Multiphase status of Buck 0. Mode of other bucks are Disabled and Multiphase status is Slave to Buck0. The EVM is now ready for testing with default register settings loaded.
GUID-DEB6D7D1-84D2-45BB-9CCE-03D6AC244468-low.pngFigure 3-6 Assert nRST
GUID-588202F7-AACF-4586-9920-E9460638E493-low.pngFigure 3-7 Read Registers Buttons
GUID-75067504-4D65-413E-BC2B-4DA1B82FF0E1-low.pngFigure 3-8 BUCK0 Enabled
GUID-050945E3-1342-4912-9EB0-57A92381B1C6-low.pngFigure 3-9 Assert EN1