SPRUIM6A October   2018  – November 2020

 

  1. 1Introduction
    1. 1.1 Key Features
  2. 2AM65x IDK Overview
  3. 3Common Processor Board
    1. 3.1 Key Features
    2. 3.2 Functional Block Diagram
    3. 3.3 Overview of Common Processor Board
      1. 3.3.1  Clocking
        1. 3.3.1.1 RTC Clock
        2. 3.3.1.2 Maxwell SoC Clock
        3. 3.3.1.3 Ethernet PHY Clocks
        4. 3.3.1.4 SERDES Clock
      2. 3.3.2  Reset
      3. 3.3.3  Power Requirements
        1. 3.3.3.1 Power Input
        2. 3.3.3.2 Overvoltage and Undervoltage Protection Circuit
        3. 3.3.3.3 Voltage Supervisor
        4. 3.3.3.4 Current Monitoring
        5. 3.3.3.5 Power Supply
        6. 3.3.3.6 Power Sequencing
        7. 3.3.3.7 SoC Power
      4. 3.3.4  Configuration
        1. 3.3.4.1 Boot Modes
        2. 3.3.4.2 JTAG
          1. 3.3.4.2.1 Test Automation
        3. 3.3.4.3 UART Interface
      5. 3.3.5  Memory Interfaces
        1. 3.3.5.1 DDR4 Interface
        2. 3.3.5.2 MMC Interface
          1. 3.3.5.2.1 SDHC Interface
          2. 3.3.5.2.2 eMMC Interface
        3. 3.3.5.3 OSPI Interface
        4. 3.3.5.4 SPI NOR Flash Interface
        5. 3.3.5.5 Board ID EEPROM Interface
        6. 3.3.5.6 Boot EEPROM Interface
      6. 3.3.6  Ethernet Interface
        1. 3.3.6.1 Gigabit Ethernet PHY Default Configuration
        2. 3.3.6.2 Ethernet LEDs
      7. 3.3.7  LCD Display Interface
      8. 3.3.8  USB 2.0 Interface
      9. 3.3.9  CSI-2 Interface
      10. 3.3.10 Application Card Interface
      11. 3.3.11 SERDES Interface
      12. 3.3.12 GPMC/DSS Interface
      13. 3.3.13 I2C Interface
      14. 3.3.14 SPI Interface
      15. 3.3.15 Timer and Interrupt
        1. 3.3.15.1 Timer
        2. 3.3.15.2 Interrupt
      16. 3.3.16 Fan Connector
  4. 4IDK Application Card
    1. 4.1 Key Features
    2. 4.2 Overview of IDK Application Board
      1. 4.2.1 Application Card Connector
      2. 4.2.2 Profibus Interface
      3. 4.2.3 CAN Interface
      4. 4.2.4 Rotary Switch
      5. 4.2.5 Industrial I/O Terminal Connector
      6. 4.2.6 Ethernet Interface
      7. 4.2.7 Board ID Memory
      8. 4.2.8 Power Supply
  5. 5x2 Lane PCIe Personality Card
    1. 5.1 Key Features
    2. 5.2 Overview of PCIex2 Daughter Card
      1. 5.2.1 Personality Card Connectors
      2. 5.2.2 USB 2.0 Interface
      3. 5.2.3 PCIe Interface
      4. 5.2.4 x2 Lane PCIe Personality Card Clocking
      5. 5.2.5 Board ID EEPROM Interface
      6. 5.2.6 x2 Lane PCIe Personality Card Power
  6. 6Known Issues
    1. 6.1 Determining the Revision and Date Code for the EVM
    2. 6.2 Known Issues for the A, E4, and E3 Revision
      1. 6.2.1 Lack of Reset for I2C IO Expander
    3. 6.3 Known Issues for the E4 & E3 Revision
      1. 6.3.1 Changes Unique to the E4 Revision Modified for 2.0 Revision
    4. 6.4 Known Issues for the E3 Revision
      1. 6.4.1 Resonance Observed on the SoC Side of Some Filters Associated with VDDA_1V8
      2. 6.4.2 Additional LDO Power Supply Needed for VDDA_1P8_SERDES0
      3. 6.4.3 Length of the RESET Signal to the PCIE Connectors on the SERDES Daughter Card
      4. 6.4.4 The PORz_OUT and MCU_PORz_OUT Signals Go High During Power Sequencing
      5. 6.4.5 Orientation of the Current Monitoring Shunt Resistors
      6. 6.4.6 SD Card IO Supply Capacitance
      7. 6.4.7 PHY Resistor Strapping Changed to Disable EEE Mode
      8. 6.4.8 The I2C Address for the I2C Boot Memory changed to 0x52
  7. 7Configuring the PRG0 and PRG1 Ethernet Interface to MII
    1. 7.1 Ethernet PHY Initial Conditions and TX Clock Signal Change
      1. 7.1.1 Ethernet PHY0 Clock and Initial Condition for MII
      2. 7.1.2 Ethernet PHY1 Clock and Initial Condition for MII
      3. 7.1.3 Ethernet PHY2 Clock and Initial Condition for MII
      4. 7.1.4 Ethernet PHY3 Clock and Initial Condition for MII
    2. 7.2 Ethernet PHY and TX Data Signals Change
      1. 7.2.1 Ethernet PHY0 TX Data Signals for MII
      2. 7.2.2 Ethernet PHY1 TX Data Signals for MII
      3. 7.2.3 Ethernet PHY2 TX Data Signals for MII
      4. 7.2.4 Ethernet PHY3 TX Data Signals for MII
  8. 8Revision History

JTAG

The common processor card includes XDS110 class on-card emulation through the micro B connector J23. It also has an optional TI20 pin (J13) connector to support external emulation. When an external emulator is connected, internal emulation circuitry is disabled. The design includes the footprint for a MIPI60pn (J32) connector with connections for JTAG and trace capabilities. The trace pins are pinmuxed with ICSSG2 RGMII signals which, by default, are connected to Ethernet PHYs on the processor board. Resistor networks are used to steer these signals to either the Ethernet PHYs or to the MIPI60 connector. The MIPI60 is not installed as delivered.

ICSSG2 Ethernet signals from the SoC are multiplexed with JTAG trace signals. Resistor options are provided to connect these signals to the Ethernet PHYs or Trace connector, as shown in Table 3-15.

Table 3-15 Selection of PRG2_Ethernet PHY (CP Board PHY) and JTAG TRACE Functionality
Signals selectedMountUn mount
PRG2 signals to Ethernet PHY (default)RA3RA10
RA5RA11
RA1RA9
R180R466
R183R463
JTAG Trace signals to J32RA10RA3
RA11RA5
RA9RA1
R466R180
R463R183
Table 3-16 TI20 Pin Connector (J13) Pin-out
Pin No.SignalPin No.Signal
1JTAG_CTI_TMS11CTI_TCK
2JTAG_TRSTN12DGND
3JTAG_CTI_TDI13JTAG_CTI_EMU0
4JTAG_TDIS14JTAG_CTI_EMU1
5VCC3V3_CTI15JTAG_CTI_EMU_RSTN
6NC16DGND
7JTAG_CTI_TDO17NC
8SEL_XDS110_INV18NC
9CTI_RTCK19NC
10DGND20DGND
Table 3-17 TI 60-pin Connector (J32) Pin-out
Pin No.SignalPin No.Signal
1VCC3V331MIPI_TRC_DAT06
2MIPI_TMS32NC
3MIPI_TCK33MIPI_TRC_DAT07
4MIPI_TDO34NC
5MIPI_TDI35MIPI_TRC_DAT08
6MIPI_EMU_RSTn36NC
7MIPI_RTCK37MIPI_TRC_DAT09
8MIPI_TRSTN38JTAG_MIPI_EMU0_1V8
9NC39MIPI_TRC_DAT10
10NC40JTAG_MIPI_EMU1_1V8
11NC41MIPI_TRC_DAT11
12VCC1V8_MIPI42NC
13MIPI_TRC_CLK43MIPI_TRC_DAT12
14NC44NC
15DGND45MIPI_TRC_DAT13
16DGND46NC
17MIPI_TRC_CTL47MIPI_TRC_DAT14
18MIPI_TRC_DAT1948NC
19MIPI_TRC_DAT0049MIPI_TRC_DAT15
20MIPI_TRC_DAT2050NC
21MIPI_TRC_DAT0151MIPI_TRC_DAT16
22MIPI_TRC_DAT2152NC
23MIPI_TRC_DAT0253MIPI_TRC_DAT17
24MIPI_TRC_DAT2254NC
25MIPI_TRC_DAT0355MIPI_TRC_DAT18
26MIPI_TRC_DAT2356NC
27MIPI_TRC_DAT0457DGND
28NC58SEL_XDS110_INV
29MIPI_TRC_DAT0559NC
30NC60NC