SPRUIM6A October 2018 – November 2020
The GPMC/DSS interface from the AM65x processor is routed to the GPMC/DSS expansion connector. This connector can be used to install an HDMI or DP adapter daughter card. The connector can also be used to attach to a circuit using the GPMC address/data bus interface. The function of the pins is defined by the pinmux definition.
The following interfaces are available on the GPMC/DSS connector:
The McAPS1 signals are multiplexed with the PRG0_RGMII signals of the application card. Resistor options are provided on the processor card to select the required interface, as shown in Figure 3-21. Refer to Table 3-32 for details.
The board supports an option to mount a 60-pin connector (QSH-030-01-L-D-A-K) or a 120-pin connector (QSH-060-01-L-D-A-K). These connector footprints are overlapped such that only one of them can be mounted. By default, the 60-pin connector is mounted.
GPMC/DSS, I2C, and USB 2.0 signals are connected to 60-pin connector (J36). The McASP1 signals are connected to the second half of the 120-pin connector. Thus, to access the McASP1 signals, the 60-pin should be unmounted and 120-pin connector should be mounted.
Pin No. | Signal | Direction |
---|---|---|
1 | VOUT1_DATA23_ | Output |
2 | VCC1V8 | Power |
3 | VOUT1_DATA22 | Bidirectional |
4 | VCC1V8 | Power |
5 | VOUT1_DATA21 | Power |
6 | NC | NA |
7 | VOUT1_DATA20 | Bidirectional |
8 | CARDID_HDMI_A0 | Output |
9 | VOUT1_DATA19 | Bidirectional |
10 | CARDID_HDMI_A1 | Output |
11 | VOUT_D18_BOOTMODE18 | Bidirectional |
12 | CARDID_HDMI_A0 | Power |
13 | VOUT_D17_BOOTMODE17 | Bidirectional |
14 | NC | NA |
15 | VOUT_D16_BOOTMODE16 | Bidirectional |
16 | PORZ_OUT | Output |
17 | DGND | Power |
18 | HDMI_GPMC_BRD_DET | Input |
19 | VOUT_D15_BOOTMODE15 | Bidirectional |
20 | VOUT1_PCLK | Output |
21 | VOUT_D14_BOOTMODE14 | Bidirectional |
22 | DGND | Power |
23 | VOUT_D13_BOOTMODE13 | Bidirectional |
24 | VOUT1_VSYNC | Output |
25 | VOUT_D12_BOOTMODE12 | Bidirectional |
26 | VOUT1_HSYNC_TEST_HDR | Output |
27 | VOUT_D11_BOOTMODE11 | Bidirectional |
28 | VOUT1_DE_TEST_HDR | Output |
29 | VOUT_D10_BOOTMODE10 | Bidirectional |
30 | DGND | Power |
31 | VOUT_D9_BOOTMODE9 | Bidirectional |
32 | SOC_MCU_SCL | Output |
33 | VOUT_D8_BOOTMODE8 | Bidirectional |
34 | SOC_MCU_SDA | Bidirectional |
35 | DGND | Power |
36 | DGND | Power |
37 | VOUT_D7_BOOTMODE7 | Bidirectional |
38 | GP1_TOUCH_EVT | Output |
39 | VOUT_D6_BOOTMODE6 | Bidirectional |
40 | CON_LCD_PWR_DN | Output |
41 | VOUT_D5_BOOTMODE5 | Power |
42 | SOC_SPI1_CS1 | Output |
43 | VOUT_D4_BOOTMODE4 | Bidirectional |
44 | SOC_SPI1_MOSI | Output |
45 | VOUT_D3_BOOTMODE3 | Bidirectional |
46 | SOC_SPI1_MISO | Input |
47 | VOUT_D2_BOOTMODE2 | Bidirectional |
48 | SOC_SPI1_CLK | Output |
49 | VOUT_D1_BOOTMODE1 | Bidirectional |
50 | USB1_HDMI_GPMC_DRVBUS | Output |
51 | VOUT_D0_BOOTMODE0 | Bidirectional |
52 | USB1_HDMI_GPMC_DM | Bidirectional |
53 | NC | NA |
54 | USB1_HDMI_GPMC_DP | Bidirectional |
55 | VCC_5V0 | Power |
56 | VCC3V3_IO | Power |
57 | VCC_5V0 | Power |
58 | VCC3V3_IO | Power |
59 | VCC_5V0 | Power |
60 | VCC3V3_IO | Power |
61 | NC | NA |
62 | NC | NA |
63 | NC | NA |
64 | NC | NA |
65 | NC | NA |
66 | NC | NA |
67 | NC | NA |
68 | NC | NA |
69 | NC | NA |
70 | NC | NA |
71 | NC | NA |
72 | NC | NA |
73 | NC | NA |
74 | NC | NA |
75 | NC | NA |
76 | NC | NA |
77 | NC | NA |
78 | NC | NA |
79 | NC | NA |
80 | NC | NA |
81 | NC | NA |
82 | NC | NA |
83 | NC | NA |
84 | NC | NA |
85 | NC | NA |
86 | NC | NA |
87 | NC | NA |
88 | NC | NA |
89 | NC | NA |
90 | NC | NA |
91 | NC | NA |
92 | NC | NA |
93 | NC | NA |
94 | NC | NA |
95 | NC | NA |
96 | NC | NA |
97 | NC | NA |
98 | NC | NA |
99 | NC | NA |
100 | NC | NA |
101 | NC | NA |
102 | NC | NA |
103 | NC | NA |
104 | NC | NA |
105 | MCASP1_AFSX_3V3 | IO |
106 | NC | NA |
107 | MCASP1_AXR1_3V3 | IO |
108 | NC | NA |
109 | MCASP1_ACLKX_3V3 | IO |
110 | NC | NA |
111 | MCASP1_AHCLKX_3V3 | IO |
112 | NC | NA |
113 | MCASP1_AXR0_3V3 | IO |
114 | NC | NA |
115 | MCASP1_ACLKR_3V3 | IO |
116 | NC | NA |
117 | MCASP1_AFSR_3V3 | IO |
118 | NC | NA |
119 | MCASP1_AHCLKR_3V3 | IO |
120 | NC | NA |