SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
| Name | Type | Reset | Description | Link |
|---|---|---|---|---|
| R0 | R/W | — | Cortex general-purpose register 0 | See Section 3.5.2.1. |
| R1 | R/W | — | Cortex general-purpose register 1 | See Section 3.5.2.2. |
| R2 | R/W | — | Cortex general-purpose register 2 | See Section 3.5.2.3. |
| R3 | R/W | — | Cortex general-purpose register 3 | See Section 3.5.2.4. |
| R4 | R/W | — | Cortex general-purpose register 4 | See Section 3.5.2.5. |
| R5 | R/W | — | Cortex general-purpose register 5 | See Section 3.5.2.6. |
| R6 | R/W | — | Cortex general-purpose register 6 | See Section 3.5.2.7. |
| R7 | R/W | — | Cortex general-purpose register 7 | See Section 3.5.2.8. |
| R8 | R/W | — | Cortex general-purpose register 8 | See Section 3.5.2.9. |
| R9 | R/W | — | Cortex general-purpose register 9 | See Section 3.5.2.10. |
| R10 | R/W | — | Cortex general-purpose register 10 | See Section 3.5.2.11. |
| R11 | R/W | — | Cortex general-purpose register 11 | See Section 3.5.2.12. |
| R12 | R/W | — | Cortex general-purpose register 12 | See Section 3.5.2.13. |
| SP | R/W | – | Stack pointer | See Section 3.5.2.14. |
| LR | R/W | 0xFFFF FFFF | Link register | See Section 3.5.2.15. |
| PC | R/W | — | Program counter | See Section 3.5.2.16. |
| PSR | R/W | 0x0100 0000 | Program status register | See Section 3.5.2.17. |
| PRIMASK | R/W | 0x0000 0000 | Priority mask register | See Section 3.5.2.18. |
| FAULTMASK | R/W | 0x0000 0000 | Fault mask register | See Section 3.5.2.19. |
| BASEPRI | R/W | 0x0000 0000 | Base priority mask register | See Section 3.5.2.20. |
| CONTROL | R/W | 0x0000 0000 | Control register | See Section 3.5.2.21. |