米6体育平台手机版

ZHCSH68F November 2017 – February 2024 UCC21220 , UCC21220A

PRODUCTION DATA

11.2 Layout Example

Figure 11-1 shows a 2-layer PCB layout example with the signals and key components labeled.

Figure 11-1 Layout Example

Figure 11-2 and Figure 11-3 shows top and bottom layer traces and copper.

Note:

There are no PCB traces or copper between the primary and secondary side, which ensures isolation performance.

PCB traces between the high-side and low-side gate drivers in the output stage are increased to maximize the creepage distance for high-voltage operation, which will also minimize cross-talk between the switching node VSSA (SW), where high dv/dt may exist, and the low-side gate drive due to the parasitic capacitance coupling.

Figure 11-2 Top Layer Traces and Copper

Figure 11-3 Bottom Layer Traces and Copper

Figure 11-4 and Figure 11-5 are 3D layout pictures with top view and bottom views.

Note:

The location of the PCB cutout between the primary side and secondary sides, which ensures isolation performance.

Figure 11-4 3-D PCB Top View

Figure 11-5 3-D PCB Bottom View