ZHCSH68F November   2017  – February 2024 UCC21220 , UCC21220A

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety-Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Thermal Derating Curves
    12. 6.12 Typical Characteristics
  8. Parameter Measurement Information
    1. 7.1 Minimum Pulses
    2. 7.2 Propagation Delay and Pulse Width Distortion
    3. 7.3 Rising and Falling Time
    4. 7.4 Input and Disable Response Time
    5. 7.5 Power-up UVLO Delay to OUTPUT
    6. 7.6 CMTI Testing
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VDD, VCCI, and Under Voltage Lock Out (UVLO)
      2. 8.3.2 Input and Output Logic Table
      3. 8.3.3 Input Stage
      4. 8.3.4 Output Stage
      5. 8.3.5 Diode Structure in UCC21220 and UCC21220A
    4. 8.4 Device Functional Modes
      1. 8.4.1 Disable Pin
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Designing INA/INB Input Filter
        2. 9.2.2.2 Select External Bootstrap Diode and its Series Resistor
        3. 9.2.2.3 Gate Driver Output Resistor
        4. 9.2.2.4 Estimating Gate Driver Power Loss
        5. 9.2.2.5 Estimating Junction Temperature
        6. 9.2.2.6 Selecting VCCI, VDDA/B Capacitor
          1. 9.2.2.6.1 Selecting a VCCI Capacitor
          2. 9.2.2.6.2 Selecting a VDDA (Bootstrap) Capacitor
          3. 9.2.2.6.3 Select a VDDB Capacitor
        7. 9.2.2.7 Application Circuits with Output Stage Negative Bias
      3. 9.2.3 Application Curves
  11. 10Power Supply Recommendations
  12. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Component Placement Considerations
      2. 11.1.2 Grounding Considerations
      3. 11.1.3 High-Voltage Considerations
      4. 11.1.4 Thermal Considerations
    2. 11.2 Layout Example
  13. 12Device and Documentation Support
    1. 12.1 第三方米6体育平台手机版_好二三四免责声明
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Receiving Notification of Documentation Updates
    4. 12.4 支持资源
    5. 12.5 Trademarks
    6. 12.6 静电放电警告
    7. 12.7 术语表
  14. 13Revision History
  15. 14Mechanical, Packaging, and Orderable Information

说明

UCC21220 和 UCC21220A 器件是具有 4A 峰值拉电流和 6A 峰值灌电流的基本隔离式和功能隔离式双通道栅极驱动器。它们设计用于在 PFC、隔离式直流/直流和同步整流应用中驱动功率 MOSFET 和 GaNFET,借助超过 100V/ns 的共模瞬态抗扰度 (CMTI),可实现快速开关性能和稳健的接地反弹保护。

这些器件可以配置为两个低侧驱动器、两个高侧驱动器或半桥驱动器。可以将两个输出并联,以形成单个驱动器,由于具有一流的延迟匹配性能,因此可以在重负载条件下使驱动强度加倍。

保护特性包括以下几项:DIS 引脚在设置为高电平时可同时关断两个输出;INA/B 引脚可抑制短于 5ns 的输入瞬态;输入和输出可以承受 –2V 的尖峰达 200ns,所有电源都具有欠压锁定 (UVLO) 功能,有源下拉保护功能可以在断电或悬空时将输出钳制在 2.1V 以下。

凭借这些特性,这些器件可以在各种电源应用中实现高效率、高功率密度和稳健性。

器件信息
器件型号(2) 封装(1) UVLO
UCC21220 D (SOIC 16) 8V
UCC21220A D (SOIC 16) 5V
有关所有可选封装,请参阅节 14
有关器件的详细比较,请参阅节 4
GUID-E0A86A36-9D6E-40B1-BEF0-5E263557D233-low.gif典型应用