ZHCSH68F
November 2017 – February 2024
UCC21220
,
UCC21220A
PRODUCTION DATA
1
1
特性
2
应用
3
说明
4
Device Comparison Table
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety-Limiting Values
6.9
Electrical Characteristics
6.10
Switching Characteristics
6.11
Thermal Derating Curves
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Minimum Pulses
7.2
Propagation Delay and Pulse Width Distortion
7.3
Rising and Falling Time
7.4
Input and Disable Response Time
7.5
Power-up UVLO Delay to OUTPUT
7.6
CMTI Testing
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
VDD, VCCI, and Under Voltage Lock Out (UVLO)
8.3.2
Input and Output Logic Table
8.3.3
Input Stage
8.3.4
Output Stage
8.3.5
Diode Structure in UCC21220 and UCC21220A
8.4
Device Functional Modes
8.4.1
Disable Pin
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Designing INA/INB Input Filter
9.2.2.2
Select External Bootstrap Diode and its Series Resistor
9.2.2.3
Gate Driver Output Resistor
9.2.2.4
Estimating Gate Driver Power Loss
9.2.2.5
Estimating Junction Temperature
9.2.2.6
Selecting VCCI, VDDA/B Capacitor
9.2.2.6.1
Selecting a VCCI Capacitor
9.2.2.6.2
Selecting a VDDA (Bootstrap) Capacitor
9.2.2.6.3
Select a VDDB Capacitor
9.2.2.7
Application Circuits with Output Stage Negative Bias
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.1.1
Component Placement Considerations
11.1.2
Grounding Considerations
11.1.3
High-Voltage Considerations
11.1.4
Thermal Considerations
11.2
Layout Example
12
Device and Documentation Support
12.1
第三方米6体育平台手机版_好二三四免责声明
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
支持资源
12.5
Trademarks
12.6
静电放电警告
12.7
术语表
13
Revision History
14
Mechanical, Packaging, and Orderable Information
1
特性
支持基本隔离和功能隔离
CMTI 大于 100V/ns
4A 峰值拉电流和 6A 峰值灌电流输出
开关参数:
40ns 最大传播延迟
5ns 最大延迟匹配
5.5ns 最大脉宽失真
35µs 最大 VDD 上电延迟
高达 18V 的 VDD 输出驱动电源
5V 和
8V VDD UVLO
选项
工作温度范围 (T
A
) = –40°C 至 125°C
窄体 SOIC-16 (D) 封装
抑制短于 5ns 的输入脉冲
TTL 和 CMOS 兼容输入
安全相关认证:
符合 DIN V VDE V 0884-11:2017-01 和 DIN EN 61010-1 标准的 4242V
PK
隔离(计划)
符合 UL 1577 标准且长达 1 分钟的 3000V
RMS
隔离
符合 GB4943.1-2011 标准的 CQC 认证(计划)
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