Run mode is the normal operating mode of the controller, when not in UVLO mode, or standby mode. In this mode, VDD current is higher because all internal control and timing functions are operating and the VG1 and VG2 outputs are driving the MOSFETs for synchronous rectification. VDD current is the sum of IVDD_RUN plus the average current necessary to drive the load on the VG1 and VG2 outputs. The VG1 and VG2 voltages are automatically adjusted based on the SR MOSFET drain-to-source voltages. Before REG pin voltage reaches VREG_ON threshold, one of the drain-to-source voltages (VD1 or VD2) must switch above V_THARM for proper switching of VG1 and VG2 outputs. This can be easily achieved by powering up the VDD from the output of the LLC or switching the LLC first before REG pin voltage reaches VREG_ON threshold.