The CAN bus has two states during operation: dominant and recessive. A dominant bus state, equivalent to logic low, is when the bus is driven differentially by a driver. A recessive bus state is when the bus is biased to a common mode of V_CC / 2 through the high-resistance internal input resistors of the receiver, equivalent to a logic high. The host microprocessor of the CAN node uses the TXD pin to drive the bus and receives data from the bus on the RXD pin. See Figure 8-1 and Figure 8-2.

Figure 8-1 Bus States (Physical Bit Representation)

Figure 8-2 Simplified Recessive Common Mode Bias and Receiver