米6体育平台手机版_好二三四详情

Sample rate (max) (Msps) 1000, 2000 Resolution (bps) 8 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2000 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.87 Power consumption (typ) (mW) 1600 Architecture Folding Interpolating SNR (dB) 46.8 ENOB (bit) 7.4 SFDR (dB) 58 Operating temperature range (°C) -40 to 85 Input buffer Yes
Sample rate (max) (Msps) 1000, 2000 Resolution (bps) 8 Number of input channels 1, 2 Interface type Parallel LVDS Analog input BW (MHz) 2000 Features Ultra High Speed Rating Catalog Peak-to-peak input voltage range (V) 0.87 Power consumption (typ) (mW) 1600 Architecture Folding Interpolating SNR (dB) 46.8 ENOB (bit) 7.4 SFDR (dB) 58 Operating temperature range (°C) -40 to 85 Input buffer Yes
HLQFP (NNB) 128 484 mm² 22 x 22
  • Single +1.9V ±0.1V Operation
  • Interleave Mode for 2x Sample Rate
  • Multiple ADC Synchronization Capability
  • Adjustment of Input Full-Scale Range, Offset, and Clock Phase Adjust
  • Choice of SDR or DDR Output Clocking
  • 1:1 or 1:2 Selectable Output Demux
  • Second DCLK Output
  • Duty Cycle Corrected Sample Clock
  • Test Pattern

Key Specifications

  • Resolution: 8 Bits
  • Max Conversion Rate: 1 GSPS (min)
  • Code Error Rate: 10−18 (typ)
  • ENOB @ 498 MHz Input (Normal Mode): 7.4 Bits (typ)
  • DNL: ±0.15 LSB (typ)
  • Power Consumption
    • Operating in Non-Demux Output: 1.6 W (typ)
    • Operating in 1:2 Demux Output: 1.7 W (typ)
    • Power Down Mode: 3.5 mW (typ)

All trademarks are the property of their respective owners.

  • Single +1.9V ±0.1V Operation
  • Interleave Mode for 2x Sample Rate
  • Multiple ADC Synchronization Capability
  • Adjustment of Input Full-Scale Range, Offset, and Clock Phase Adjust
  • Choice of SDR or DDR Output Clocking
  • 1:1 or 1:2 Selectable Output Demux
  • Second DCLK Output
  • Duty Cycle Corrected Sample Clock
  • Test Pattern

Key Specifications

  • Resolution: 8 Bits
  • Max Conversion Rate: 1 GSPS (min)
  • Code Error Rate: 10−18 (typ)
  • ENOB @ 498 MHz Input (Normal Mode): 7.4 Bits (typ)
  • DNL: ±0.15 LSB (typ)
  • Power Consumption
    • Operating in Non-Demux Output: 1.6 W (typ)
    • Operating in 1:2 Demux Output: 1.7 W (typ)
    • Power Down Mode: 3.5 mW (typ)

All trademarks are the property of their respective owners.

The ADC08D1020 is a dual, low power, high performance, CMOS analog-to-digital converter that builds upon the ADC08D1000 platform. The ADC08D1020 digitizes signals to 8 bits of resolution at sample rates up to 1.3 GSPS. It has expanded features compared to the ADC08D1000, which include a test pattern output for system debug, a clock phase adjust, and selectable output demultiplexer modes. Consuming a typical 1.6 Watts in non-demultiplex mode at 1 GSPS from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.4 Effective Number of Bits (ENOB) with a 498 MHz input signal and a 1 GHz sample rate while providing a 10−18 Code Error Rate (C.E.R.) Output formatting is offset binary and the Low Voltage Differential Signaling (LVDS) digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.

Each converter has a selectable output demultiplexer which feeds two LVDS buses. If the 1:2 demultiplexed mode is selected, the output data rate is reduced to half the input sample rate on each bus. When non-demultiplexed mode is selected, that output data rate on channels DI and DQ are at the same rate as the input sample clock. The two converters can be interleaved and used as a single 2 GSPS ADC.

The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a leaded or lead-free 128-lead, thermally enhanced, exposed pad, HLQFP and operates over the Industrial (-40°C ≤ TA ≤ +85°C) temperature range.

The ADC08D1020 is a dual, low power, high performance, CMOS analog-to-digital converter that builds upon the ADC08D1000 platform. The ADC08D1020 digitizes signals to 8 bits of resolution at sample rates up to 1.3 GSPS. It has expanded features compared to the ADC08D1000, which include a test pattern output for system debug, a clock phase adjust, and selectable output demultiplexer modes. Consuming a typical 1.6 Watts in non-demultiplex mode at 1 GSPS from a single 1.9 Volt supply, this device is ensured to have no missing codes over the full operating temperature range. The unique folding and interpolating architecture, the fully differential comparator design, the innovative design of the internal sample-and-hold amplifier and the calibration schemes enable a very flat response of all dynamic parameters beyond Nyquist, producing a high 7.4 Effective Number of Bits (ENOB) with a 498 MHz input signal and a 1 GHz sample rate while providing a 10−18 Code Error Rate (C.E.R.) Output formatting is offset binary and the Low Voltage Differential Signaling (LVDS) digital outputs are compatible with IEEE 1596.3-1996, with the exception of an adjustable common mode voltage between 0.8V and 1.2V.

Each converter has a selectable output demultiplexer which feeds two LVDS buses. If the 1:2 demultiplexed mode is selected, the output data rate is reduced to half the input sample rate on each bus. When non-demultiplexed mode is selected, that output data rate on channels DI and DQ are at the same rate as the input sample clock. The two converters can be interleaved and used as a single 2 GSPS ADC.

The converter typically consumes less than 3.5 mW in the Power Down Mode and is available in a leaded or lead-free 128-lead, thermally enhanced, exposed pad, HLQFP and operates over the Industrial (-40°C ≤ TA ≤ +85°C) temperature range.

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* 数据表 ADC08D1020 Low Power, 8-Bit, Dual 1.0 GSPS or Single 2.0 GSPS A/D Converter 数据表 (Rev. D) 2013年 3月 14日

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ADC08D1520RB — ADC08D1520RB:低功耗、8 位、双路 1.5 GSPS 或单路 3.0 GSPS 模数转换器参考板

The ADC08D1520 is the latest advance in Texas Instrument’s Ultra-High-Speed ADC family. This low-power, high-performance CMOS analog-to-digital converter digitizes signals at 8-bit resolution for dual channels at sampling rates of up to 1.5 GSPS (Non-Interleave Mode) or for a single channel up to (...)

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支持的米6体育平台手机版_好二三四和硬件

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米6体育平台手机版_好二三四
高速 ADC (≥10MSPS)
ADC08D1020 8 位、双路 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) ADC08D1520 8 位、双路 1.5GSPS 或单路 3.0GSPS 模数转换器 (ADC) ADC10D1000 10 位、双通道 1.0GSPS 或单路 2.0GSPS 模数转换器 (ADC) ADC10D1500 10 位、双通道 1.5GSPS 或单通道 3.0GSPS 模数转换器 (ADC) ADC10DV200 双通道、10 位、200MSPS 模数转换器 (ADC) ADC12D1000 12 位、双通道 1.0GSPS 或单通道 2.0GSPS 模数转换器 (ADC) ADC12D1000RF 12 位、双通道 1.0GSPS 或单通道 2.0GSPS 射频采样模数转换器 (ADC) ADC12D1600 12 位、双通道 1.6GSPS 或单通道 3.2GSPS 模数转换器 (ADC) ADC12D1600RF 12 位双通道 1.6GSPS 或单通道 3.2GSPS 射频采样模数转换器 (ADC) ADC12D1800 12 位、双通道 1.8GSPS 或单通道 3.6GSPS 模数转换器 (ADC) ADC12D1800RF 12 位、双通道 1.8GSPS 或单通道 3.6GSPS、射频采样模数转换器 (ADC) ADC12D500RF 12 位、双通道 500MSPS 或单通道 1.0GSPS 射频采样模数转换器 (ADC) ADC12D800RF 12 位、双通道 800MSPS 或单通道 1.6GSPS 射频采样模数转换器 (ADC) ADC14DC080 双通道、14 位、80MSPS、1.0GHz 输入带宽模数转换器 (ADC) ADC16DV160 双通道、16 位、160MSPS 模数转换器 (ADC) ADC16V130 16 位、130MSPS 模数转换器 (ADC)
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