TMS570LC4357-EP

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增强型米6体育平台手机版_好二三四 16/32 位 RISC 闪存 MCU、Arm Cortex-R5F、EMAC、FlexRay

米6体育平台手机版_好二三四详情

Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
Frequency (MHz) 300 Flash memory (kByte) 4096 RAM (kByte) 512 ADC type 2 x 12-bit (41ch) Number of GPIOs 168 UART 4 Features Hercules high-performance microcontroller TI functional safety category Functional Safety-Compliant Operating temperature range (°C) -55 to 125 Ethernet Yes PWM (Ch) 78 CAN (#) 4 Power supply solution TPS65381A-Q1 Communication interface CAN, Ethernet, FlexRay, SPI, UART Rating HiRel Enhanced Product
NFBGA (GWT) 337 256 mm² 16 x 16
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM® Cortex® - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules™ Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight™ Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM™, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability
  • High-Performance Automotive-Grade Microcontroller for Safety-Critical Applications
    • Dual-Core Lockstep CPUs With ECC-Protected Caches
    • ECC on Flash and RAM Interfaces
    • Built-In Self-Test (BIST) for CPU, High-End Timers, and On-Chip RAMs
    • Error Signaling Module (ESM) With Error Pin
    • Voltage and Clock Monitoring
  • ARM® Cortex® - R5F 32-Bit RISC CPU
    • 1.66 DMIPS/MHz With 8-Stage Pipeline
    • FPU With Single- and Double-Precision
    • 16-Region Memory Protection Unit (MPU)
    • 32KB of Instruction and 32KB of Data Caches With ECC
    • Open Architecture With Third-Party Support
  • Operating Conditions
    • Up to 300-MHz CPU Clock
    • Core Supply Voltage (VCC): 1.14 to 1.32 V
    • I/O Supply Voltage (VCCIO): 3.0 to 3.6 V
  • Integrated Memory
    • 4MB of Program Flash With ECC
    • 512KB of RAM With ECC
    • 128KB of Data Flash for Emulated EEPROM With ECC
  • 16-Bit External Memory Interface (EMIF)
  • Hercules™ Common Platform Architecture
    • Consistent Memory Map Across Family
    • Real-Time Interrupt (RTI) Timer (OS Timer)
    • Two 128-Channel Vectored Interrupt Modules (VIMs) With ECC Protection on Vector Table
      • VIM1 and VIM2 in Safety Lockstep Mode
    • Two 2-Channel Cyclic Redundancy Checker (CRC) Modules
  • Direct Memory Access (DMA) Controller
    • 32 Channels and 48 Peripheral Requests
    • ECC Protection for Control Packet RAM
    • DMA Accesses Protected by Dedicated MPU
  • Frequency-Modulated Phase-Locked Loop (FMPLL) With Built-In Slip Detector
  • Separate Nonmodulating PLL
  • IEEE 1149.1 JTAG, Boundary Scan, and ARM CoreSight™ Components
  • Advanced JTAG Security Module (AJSM) 
  • Trace and Calibration Capabilities
    • ETM™, RTP, DMM, POM
  • Multiple Communication Interfaces
    • 10/100 Mbps Ethernet MAC (EMAC)
      • IEEE 802.3 Compliant (3.3-V I/O Only)
      • Supports MII, RMII, and MDIO
    • FlexRay Controller With 2 Channels
      • 8KB of Message RAM With ECC Protection
      • Dedicated FlexRay Transfer Unit (FTU)
    • Four CAN Controller (DCAN) Modules
      • 64 Mailboxes, Each With ECC Protection
      • Compliant to CAN Protocol Version 2.0B
    • Two Inter-Integrated Circuit (I2C) Modules
    • Five Multibuffered Serial Peripheral Interface (MibSPI) Modules
      • MibSPI1: 256 Words With ECC Protection
      • Other MibSPIs: 128 Words With ECC Protection
    • Four UART (SCI) Interfaces, Two With Local Interconnect Network (LIN 2.1) Interface Support
  • Two Next Generation High-End Timer (N2HET) Modules
    • 32 Programmable Channels Each
    • 256-Word Instruction RAM With Parity
    • Hardware Angle Generator for Each N2HET
    • Dedicated High-End Timer Transfer Unit (HTU) for Each N2HET
  • Two 12-Bit Multibuffered Analog-to-Digital Converter (MibADC) Modules
    • MibADC1: 32 Channels Plus Control for up to 1024 Off-Chip Channels
    • MibADC2: 25 Channels
    • 16 Shared Channels
    • 64 Result Buffers Each With Parity Protection
  • Enhanced Timing Peripherals
    • 7 Enhanced Pulse Width Modulator (ePWM) Modules
    • 6 Enhanced Capture (eCAP) Modules
    • 2 Enhanced Quadrature Encoder Pulse (eQEP) Modules
  • Three On-Die Temperature Sensors
  • Up to 145 Pins Available for General-Purpose I/O (GPIO)
  • 16 Dedicated GPIO Pins With External Interrupt Capability
  • Packages
    • 337-Ball Grid Array (GWT) [Green]
  • Supports Defense, Aerospace, and Medical Applications:
    • Controlled Baseline
    • One Assembly/Test Site
    • One Fabrication Site
    • Available in Extended (–55°C to 125°C) Temperature Range
    • Extended Product Life Cycle
    • Extended Product-Change Notification
    • Product Traceability

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

The TMS570LC4357-EP device is part of the Hercules TMS570 series of high-performance automotive-grade ARM® Cortex®-R-based MCUs. Comprehensive documentation, tools, and software are available to assist in the development of ISO 26262 and IEC 61508 functional safety applications. Start evaluating today with the Hercules TMS570LC43x LaunchPad Development Kit. The TMS570LC4357-EP device has on-chip diagnostic features including: dual CPUs in lockstep, Built-In Self-Test (BIST) logic for CPU, the N2HET coprocessors, and for on-chip SRAMs; ECC protection on the L1 caches, L2 flash, and SRAM memories. The device also supports ECC or parity protection on peripheral memories and loopback capability on peripheral I/Os.

The TMS570LC4357-EP device integrates two ARM Cortex-R5F floating-point CPUs, operating in lockstep, which offer an efficient 1.66 DMIPS/MHz, and can run up to 300 MHz providing up to 498 DMIPS. The device supports the big-endian [BE32] format.

The TMS570LC4357-EP device has 4MB of integrated flash and 512KB of data RAM with single-bit error correction and double-bit error detection. The flash memory on this device is a nonvolatile, electrically erasable and programmable memory, implemented with a 64-bit-wide data bus interface. The flash operates on a 3.3-V supply input (the same level as the I/O supply) for all read, program, and erase operations. The SRAM supports read and write accesses in byte, halfword, and word modes.

The TMS570LC4357-EP device features peripherals for real-time control-based applications, including two Next Generation High-End Timer (N2HET) timing coprocessors with up to 64 total I/O terminals.

The N2HET is an advanced intelligent timer that provides sophisticated timing functions for real-time applications. The timer is software-controlled, with a specialized timer micromachine and an attached I/O port. The N2HET can be used for pulse-width-modulated outputs, capture or compare inputs, or GPIO. The N2HET is especially well suited for applications requiring multiple sensor information or drive actuators with complex and accurate time pulses. The High-End Timer Transfer Unit (HTU) can perform DMA-type transactions to transfer N2HET data to or from main memory. A Memory Protection Unit (MPU) is built into the HTU.

The Enhanced Pulse Width Modulator (ePWM) module can generate complex pulse width waveforms with minimal CPU overhead or intervention. The ePWM is easy to use and supports both high-side and low-side PWM and deadband generation. With integrated trip zone protection and synchronization with the on-chip MibADC, the ePWM is ideal for digital motor control applications.

The Enhanced Capture (eCAP) module is essential in systems where the accurately timed capture of external events is important. The eCAP can also be used to monitor the ePWM outputs or for simple PWM generation when not needed for capture applications.

The Enhanced Quadrature Encoder Pulse (eQEP) module directly interfaces with a linear or rotary incremental encoder to get position, direction, and speed information from a rotating machine as used in high-performance motion and position-control systems.

The device has two 12-bit-resolution MibADCs with 41 total channels and 64 words of parity-protected buffer RAM. The MibADC channels can be converted individually or by group for special conversion sequences. Sixteen channels are shared between the two MibADCs. Each MibADC supports three separate groupings. Each sequence can be converted once when triggered or configured for continuous conversion mode. The MibADC has a 10-bit mode for use when compatibility with older devices or faster conversion time is desired. One of the channels in MibADC1 and two of the channels in MibADC2 can be used to convert temperature measurements from the three on-chip temperature sensors.

The device has multiple communication interfaces: Five MibSPIs; four UART (SCI) interfaces, two with LIN support; four CANs; two I2C modules; one Ethernet Controller; and one FlexRay controller. The SPI provides a convenient method of serial interaction for high-speed communications between similar shift-register type devices. The LIN supports the Local Interconnect standard (LIN 2.1) and can be used as a UART in full-duplex mode using the standard Non-Return-to-Zero (NRZ) format. The DCAN supports the CAN 2.0B protocol standard and uses a serial, multimaster communication protocol that efficiently supports distributed real-time control with robust communication rates of up to 1 Mbps. The DCAN is ideal for applications operating in noisy and harsh environments (for example, automotive and industrial fields) that require reliable serial communication or multiplexed wiring. The FlexRay controller uses a dual-channel serial, fixed time base multimaster communication protocol with communication rates of 10 Mbps per channel. A FlexRay Transfer Unit (FTU) enables autonomous transfers of FlexRay data to and from main CPU memory. HTU transfers are protected by a dedicated, built-in MPU. The Ethernet module supports MII, RMII, and Management Data I/O (MDIO) interfaces. The I2C module is a multimaster communication module providing an interface between the microcontroller and an I2C-compatible device through the I2C serial bus. The I2C module supports speeds of 100 and 400 kbps.

The Frequency-Modulated Phase-Locked Loop (FMPLL) clock module multiplies the external frequency reference to a higher frequency for internal use. The Global Clock Module (GCM) manages the mapping between the available clock sources and the internal device clock domains.

The device also has two External Clock Prescaler (ECP) modules. When enabled, the ECPs output a continuous external clock on the ECLK1 and ECLK2 balls. The ECLK frequency is a user-programmable ratio of the peripheral interface clock (VCLK) frequency. This low-frequency output can be monitored externally as an indicator of the device operating frequency.

The Direct Memory Access (DMA) controller has 32 channels, 48 peripheral requests, and ECC protection on its memory. An MPU is built into the DMA to protect memory against erroneous transfers.

The Error Signaling Module (ESM) monitors on-chip device errors and determines whether an interrupt or external Error pin/ball (nERROR) is triggered when a fault is detected. The nERROR signal can be monitored externally as an indicator of a fault condition in the microcontroller.

The External Memory Interface (EMIF) provides a memory extension to asynchronous and synchronous memories or other slave devices.

A Parameter Overlay Module (POM) is included to enhance the debugging capabilities of application code. The POM can reroute flash accesses to internal RAM or to the EMIF, thus avoiding the reprogramming steps necessary for parameter updates in flash. This capability is particularly helpful during real-time system calibration cycles.

Several interfaces are implemented to enhance the debugging capabilities of application code. In addition to the built-in ARM Cortex-R5F CoreSight debug features, the Embedded Cross Trigger (ECT) supports the interaction and synchronization of multiple triggering events within the SoC. An External Trace Macrocell (ETM) provides instruction and data trace of program execution. For instrumentation purposes, a RAM Trace Port (RTP) module is implemented to support high-speed tracing of RAM and peripheral accesses by the CPU or any other master. A Data Modification Module (DMM) gives the ability to write external data into the device memory. Both the RTP and DMM have no or minimal impact on the program execution time of the application code.

With integrated safety features and a wide choice of communication and control peripherals, the TMS570LC4357-EP device is an ideal solution for high-performance real-time control applications with safety-critical requirements.

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类型 标题 下载最新的英语版本 日期
* 数据表 TMS570LC4357-EP Hercules™ Microcontroller Based on the ARM® Cortex®-R Core 数据表 (Rev. A) PDF | HTML 2019年 9月 18日
* 勘误表 TMS570LC4357 Microcontroller Silicon Errata (Silicon Revision A) (Rev. D) 2016年 5月 31日
* VID TMS570LC4357-EP VID V62/186060-01XF 2020年 9月 22日
* 用户指南 TMS570LC43x 16/32 RISC Flash Microcontroller Technical Reference Manual (Rev. A) 2018年 3月 1日
证书 TUEV SUED Certification for TMS570LC43x (Rev. A) 2024年 6月 21日
功能安全信息 Certification for Functional Safety Hardware Process (Rev. B) 2022年 6月 9日
更多文献资料 Hercules™ Diagnostic Library Test Automation Unit User Guide (Rev. B) PDF | HTML 2020年 1月 9日
更多文献资料 HALCoGen-CSP 04.07.01 (Rev. C) PDF | HTML 2020年 1月 8日
功能安全信息 HALCoGen-CSP Installation Guide (Rev. B) PDF | HTML 2020年 1月 8日
功能安全信息 HALCoGen-CSP User's Guide (Rev. C) PDF | HTML 2020年 1月 8日
功能安全信息 Hercules Diagnostic Library -TAU Installation Guide (Rev. B) PDF | HTML 2020年 1月 8日
用户指南 Hercules Diagnostic Library CSP Without LDRA 2019年 10月 29日
更多文献资料 Diagnostic Library CSP Release Notes 2019年 10月 17日
应用手册 HALCoGen Ethernet Driver With lwIP Integration Demo and Active Webserver Demo PDF | HTML 2019年 9月 13日
应用手册 Hercules PLL Advisory SSWF021#45 Workaround (Rev. B) PDF | HTML 2019年 9月 9日
应用手册 CAN Bus Bootloader for Hercules Microcontrollers PDF | HTML 2019年 8月 21日
应用手册 HALCoGen CSP Without LDRA Release_Notes 2019年 8月 19日
用户指南 HALCoGen-CSP Without LDRA Installation Guide PDF | HTML 2019年 8月 19日
用户指南 HALCoGen-CSP Without LDRA User's Guide PDF | HTML 2019年 8月 19日
用户指南 Hercules Diagnostic Library - Without LDRA Installation Guide PDF | HTML 2019年 8月 19日
用户指南 Hercules™ Diag Lib Test Automation Unit Without LDRA User's Guide PDF | HTML 2019年 8月 19日
功能安全信息 Certification for SafeTI Functional Safety Hardware Process (Rev. A) 2019年 6月 7日
应用手册 Interfacing the Embedded 12-Bit ADC in a TMS570LS31x/21x and RM4x Series MCUs (Rev. A) 2018年 4月 20日
应用手册 FreeRTOS on Hercules Devices_new 2018年 4月 19日
应用手册 MPU and Cache Settings in TMS570LC43x/RM57x Devices 2018年 4月 19日
应用手册 Sharing FEE Blocks Between the Bootloader and the Application 2017年 11月 7日
应用手册 Sharing Exception Vectors on Hercules™ Based Microcontrollers 2017年 3月 27日
应用手册 Hercules AJSM Unlock (Rev. A) PDF | HTML 2016年 10月 19日
功能安全信息 Safety Manual for TMS570LC4x Hercules ARM Safety Critical Microcontrollers (Rev. A) 2016年 10月 19日
应用手册 How to Create a HALCoGen Based Project For CCS (Rev. B) 2016年 8月 9日
应用手册 Using the CRC Module on Hercules™-Based Microcontrollers 2016年 8月 4日
应用手册 Using the SPI as an Extra UART Transmitter 2016年 7月 26日
白皮书 Hercules MCUs for Use in Electrical Vehicle Battery Management system 2016年 5月 12日
功能安全信息 Functional Safety Audit: SafeTI Functional Safety Hardware Development (Rev. A) 2016年 4月 25日
应用手册 High Speed Serial Bus Using the MibSPIP Module on Hercules-Based MCUs 2016年 4月 22日
应用手册 TMS570LC4357 and RM57L843 On-Chip Temperature Sensor Measurements 2016年 1月 18日
功能安全信息 Enabling Functional Safety Using SafeTI Diagnostic Library 2015年 12月 18日
应用手册 Triggering ADC Using Internal Timer Events on Hercules MCUs 2015年 10月 19日
白皮书 Extending TI’s Hercules MCUs with the integrated flexible HET 2015年 9月 29日
应用手册 PWM Generation and Input Capture Using HALCoGen N2HET Module 2015年 6月 30日
功能安全信息 Foundational Software for Functional Safety 2015年 5月 12日
应用手册 Sine Wave Generation Using PWM With Hercules N2HET and HTU 2015年 5月 12日
应用手册 Triangle/Trapezoid Wave Generation Using PWM With Hercules N2HET 2015年 5月 1日
应用手册 Nested Interrupts on Hercules ARM Cortex-R4/5-Based Microncontrollers 2015年 4月 23日
白皮书 Latch-Up White Paper PDF | HTML 2015年 4月 22日
应用手册 Interrupt and Exception Handling on Hercules ARM Cortex-R4/5-Based MCUs 2015年 4月 20日
应用手册 Monitoring PWM Using N2HET 2015年 4月 2日
应用手册 Hercules SCI With DMA 2015年 3月 22日
证书 TÜV NORD Certificate for Functional Safety Software Development Process 2015年 2月 3日
功能安全信息 Calculating Equivalent Power-on-Hours for Hercules Safety MCUs 2015年 1月 26日
功能安全信息 TUV SUD ISO-13849 Safety Architecture Concept Study 2014年 7月 2日
更多文献资料 HaLCoGen Release Notes 2014年 6月 25日
功能安全信息 Hercules TMS570LC/RM57Lx Safety MCUs Development Insights Using Debug and Trace 2014年 5月 21日
应用手册 Interfacing TPS65381 With Hercules Microcontrollers (Rev. A) 2014年 2月 14日
用户指南 Trace Analyzer User's Guide (Rev. B) 2013年 11月 18日
功能安全信息 IEC 60730 and UL 1998 Safety Standard Compliance Made Easier with TI Hercules 2013年 10月 3日
白皮书 Model-Based Tool Qualification of the TI C/C++ ARM® Compiler 2013年 6月 6日
应用手册 Hercules Family Frequency Slewing to Reduce Voltage and Current Transients 2012年 7月 5日
应用手册 Basic PBIST Configuration and Influence on Current Consumption (Rev. C) 2012年 4月 12日
应用手册 Verification of Data Integrity Using CRC 2012年 2月 17日
应用手册 FlexRay Transfer Unit (FTU) Setup 2012年 1月 26日
用户指南 HET Integrated Development Environment User's Guide (Rev. A) 2011年 11月 17日
功能安全信息 Important ARM Ltd Application Notes for TI Hercules ARM Safety MCUs 2011年 11月 17日
功能安全信息 Execution Time Measurement for Hercules ARM Safety MCUs (Rev. A) 2011年 11月 4日
应用手册 Use of All 1'’s and All 0's Valid in Flash EEPROM Emulation 2011年 9月 27日
应用手册 3.3 V I/O Considerations for Hercules Safety MCUs (Rev. A) 2011年 9月 6日
功能安全信息 Configuring the Hercules ARM Safety MCU SCI/LIN Module for UART Communication (Rev. A) 2011年 9月 6日
功能安全信息 Hercules™ Microcontrollers: Real-time MCUs for safety-critical products 2011年 9月 2日
应用手册 ECC Handling in TMSx70-Based Microcontrollers 2011年 2月 23日
用户指南 TI ICEPick Module Type C Reference Guide Public Version 2011年 2月 17日
应用手册 NHET Getting Started (Rev. B) 2010年 8月 30日
功能安全信息 Generating Operating System Tick Using RTI on a Hercules ARM Safety MCU 2010年 7月 13日
功能安全信息 Usage of MPU Subregions on TI Hercules ARM Safety MCUs 2010年 3月 10日
用户指南 TI Assembly Language Tools Enhanced High-End Timer (NHET) Assembler User's Guide 2010年 3月 4日
白皮书 Discriminating between Soft Errors and Hard Errors in RAM White Paper 2008年 6月 4日

设计和开发

如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。

调试探针

TMDSEMU200-U — XDS200 USB 调试探针

XDS200 是用于调试 TI 嵌入式器件的调试探针(仿真器)。与低成本的 XDS110 和高性能的 XDS560v2 相比,XDS200 在低成本和高性能之间实现了平衡;并在单个仓体中支持广泛的标准(IEEE1149.1、IEEE1149.7、SWD)。所有 XDS 调试探针在所有具有嵌入式跟踪缓冲器 (ETB) 的 Arm® 和 DSP 处理器中均支持内核和系统跟踪。对于引脚上的内核跟踪,则需要使用 XDS560v2 PRO TRACE

XDS200 通过 TI 20 引脚连接器(带有适用于 TI 14 引脚、Arm Cortex® 10 引脚和 Arm 20 (...)

TI.com 上无现货
调试探针

TMDSEMU560V2STM-U — XDS560™ 软件 v2 系统跟踪 USB 调试探针

XDS560v2 是 XDS560™ 系列调试探针中性能非常出色的米6体育平台手机版_好二三四,同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。请注意,它不支持串行线调试 (SWD)。

所有 XDS 调试探针在所有具有嵌入式跟踪缓冲器 (ETB) 的 ARM 和 DSP 处理器中均支持内核和系统跟踪。对于引脚上的跟踪,需要 XDS560v2 PRO TRACE

XDS560v2 通过 MIPI HSPT 60 引脚连接器(带有多个用于 TI 14 引脚、TI 20 引脚和 ARM 20 引脚的适配器)连接到目标板,并通过 USB2.0 高速 (480Mbps) (...)

TI.com 上无现货
调试探针

TMDSEMU560V2STM-UE — Spectrum Digital XDS560v2 系统跟踪 USB 和以太网

XDS560v2 System Trace 是 XDS560v2 系列高性能 TI 处理器调试探针(仿真器)的第一种型号。XDS560v2 是 XDS 系列调试探针中性能最高的一款,同时支持传统 JTAG 标准 (IEEE1149.1) 和 cJTAG (IEEE1149.7)。

XDS560v2 System Trace 在其巨大的外部存储器缓冲区中加入了系统引脚跟踪。这种外部存储器缓冲区适用于指定的 TI 器件,通过捕获相关器件级信息,获得准确的总线性能活动和吞吐量,并对内核和外设进行电源管理。此外,对于带有嵌入式缓冲跟踪器 (ETB) 的所有 ARM 和 DSP 处理器,所有 XDS (...)

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开发套件

LAUNCHXL2-570LC43 — Hercules TMS570LC43x LaunchPad 开发套件

Hercules™ TMS570LC43x LaunchPad™ 开发套件是基于超高性能 Hercules MCU TMS570LC4357(基于 ARM® Cortex®-R5F、缓存锁步、300MHz TMS570 系列汽车级 MCU)的低成本评估平台,旨在帮助开发 ISO 26262IEC 61508 功能安全应用。

该 LaunchPad 具有 IEEE 1588 精确时间以太网 PHY DP83630 之类的连接选项,并且除了标准 BoosterPack 接头外,还可以使用用于 MCU 并行接口(EMIF、RTP 和 DMM)的高密度连接器进一步扩展到 FPGA 或外部 (...)

用户指南: PDF
TI.com 上无现货
开发套件

TMDX570LC43HDK — TMDX570LC43HDK Hercules 开发套件

The TMS570LC43x Hercules Development Kit is ideal for getting started on development with the Hercules TMS570LC4357 high-performance safety microcontrollers. The kit is comprised of a development board, a DC power supply, a mini-B USB cable, an Ethernet cable and a software installation DVD that (...)

用户指南: PDF
TI.com 上无现货
IDE、配置、编译器或调试器

CCSTUDIO Code Composer Studio 集成式开发环境 (IDE)

Code Composer Studio is an integrated development environment (IDE) for TI's microcontrollers and processors. It comprises a suite of tools used to develop and debug embedded applications.  Code Composer Studio is available for download across Windows®, Linux® and macOS® desktops. It can also (...)

支持的米6体育平台手机版_好二三四和硬件

支持的米6体育平台手机版_好二三四和硬件

此设计资源支持这些类别中的大部分米6体育平台手机版_好二三四。

查看米6体育平台手机版_好二三四详情页,验证是否能提供支持。

启动 下载选项
仿真模型

TMS570LC4357 ZWT Ibis Model

SPNM063.ZIP (617 KB) - IBIS Model
仿真模型

TMS570LC43xx ZWT BSDL Model

SPNM050.ZIP (9 KB) - BSDL Model
封装 引脚 CAD 符号、封装和 3D 模型
NFBGA (GWT) 337 Ultra Librarian

订购和质量

包含信息:
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息:
  • 制造厂地点
  • 封装厂地点

推荐米6体育平台手机版_好二三四可能包含与 TI 此米6体育平台手机版_好二三四相关的参数、评估模块或参考设计。

支持和培训

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