DATA SHEET
TPS54541 具有软启动和 Eco-mode™ 的 4.5V 至 42V 输入、5A、降压 DC-DC 转换器
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1 特性
- 轻负载条件下使用脉冲跳跃实现的高效率 Eco-mode。™
- 87mΩ 高侧金属氧化物半导体场效应晶体管 (MOSFET)
- 152μA 静态运行电流和
2μA 关断电流 - 100kHz 至 2.5MHz 可调开关频率
- 同步至外部时钟
- 轻负载条件下使用集成型引导 (BOOT) 再充电场效应晶体管 (FET) 实现的低压降
- 可调欠压闭锁 (UVLO) 电压和滞后
- 欠压 (UV) 和过压 (OV) 电源正常输出
- 可调软启动和定序
- 0.8V 1% 内部电压基准
- 带有散热焊盘的 10 引脚晶圆级小外形无引线 (WSON) 封装
- TJ 运行范围为 -40°C 至 150°C
- 使用 TPS54541 并借助 WEBENCH Power Designer 创建定制设计方案
2 应用
3 说明
TPS54541 器件是一款 42V 5A 降压型稳压器，此稳压器具有一个集成型高侧 MOSFET。按照 ISO 7637 标准，此器件能够耐受高达 45V 的抛负载脉冲。电流模式控制提供了简单的外部补偿和灵活的组件选择。一个低纹波脉冲跳跃模式将无负载输出电源电流减小至 152μA。使能引脚下拉为低电平后，关断电源电流降至 2µA。
欠压闭锁在内部设定为 4.3V，但可用一个使能引脚上的外部电阻分压器将之提高。输出电压启动斜坡受控于软启动引脚，该引脚还可被配置用来控制电源排序和跟踪。一个开漏电源正常信号表示输出处于标称电压值的 93% 至 106% 之内。
宽可调开关频率范围可针对效率或者外部组件尺寸进行优化。逐周期电流限制、频率折返和热关断功能可在过载情况下保护内部和外部组件。
TPS54541 器件采用 10 引脚 4mm x 4mm WSON 封装。
器件信息(1)
| 器件型号 | 封装 | 封装尺寸（标称值） |
|---|---|---|
| TPS54541 | WSON (10) | 4.00mm x 4.00mm |
- 要了解所有可用封装，请见数据表末尾的可订购米6体育平台手机版_好二三四附录。
间隔
空白
简化电路原理图
效率与负载电流间的关系
4 修订历史记录
Changes from B Revision (February 2016) to C Revision
- WEBENCH 信息至特性，详细设计流程和器件支持部分Go
- Changed Equation 10 and Equation 11 Go
- Changed Equation 30 Go
- Changed From: "power pad" To: "thermal pad" in the Layout Guidelines sectionGo
Changes from A Revision (August 2015) to B Revision
- Added: SW, 5-ns Transient to the Absolute Maximum Ratings Go
- Changed text in the Application Information From: "iterative design procedure" To: "interactive design procedure"Go
Changes from * Revision (October 2013) to A Revision
- Added ESD 额定值表，特性 描述部分，器件功能模式，应用和实施部分，电源相关建议部分，布局部分，器件和文档支持部分以及机械、封装和可订购信息部分Go
5 Pin Configuration and Functions
DPR Package
10-Pin WSON With Exposed Thermal Pad
Top View
Pin Functions
| PIN | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | NO. | |||
| BOOT | 1 | O | A bootstrap capacitor is required between BOOT and SW. If the voltage on this capacitor is below the minimum required to operate the high-side MOSFET, the gate drive is switched off until the capacitor is refreshed. | |
| COMP | 7 | O | Error amplifier output and input to the output switch current (PWM) comparator. Connect frequency compensation components to this pin. | |
| EN | 3 | I | Enable pin, with an internal pullup current source. Pull below 1.2 V to disable. Float to enable. Adjust the input undervoltage lockout with two resistors. See the Enable and Adjusting Undervoltage Lockout section. | |
| FB | 6 | I | Inverting input of the transconductance (gm) error amplifier. | |
| GND | 8 | – | Ground | |
| PWRGD | 10 | O | Power Good is an open drain output that asserts low if the output voltage is out of regulation due to thermal shutdown, dropout, over-voltage or EN shut down. | |
| RT/CLK | 5 | I | Resistor Timing and External Clock. An internal amplifier holds this pin at a fixed voltage when using an external resistor to ground to set the switching frequency. If the pin is pulled above the PLL upper threshold, a mode change occurs and the pin becomes a synchronization input. The internal amplifier is disabled and the pin is a high impedance clock input to the internal PLL. If clocking edges stop, the internal amplifier is re-enabled and the operating mode returns to resistor frequency programming. | |
| SS/TR | 4 | I | Soft-start and Tracking. An external capacitor connected to this pin sets the output rise time. Because the voltage on this pin overrides the internal reference, SS/TR can be used for tracking and sequencing. | |
| SW | 9 | O | The source of the internal high-side power MOSFET and switching node of the converter. | |
| VIN | 2 | I | Input supply voltage with 4.5-V to 42-V operating range. | |
| Thermal Pad | 11 | – | The GND pin must be electrically connected to the exposed pad on the printed circuit board for proper operation. | |