1 Features

2-bit bidirectional translator for SDA and SCL lines in I²C applications
Provides bidirectional voltage translation with no direction pin
High-impedance output SCL_A, SDA_A, SCL_B, SDA_B pins when OE = 0 V or V_CC = 0 V
Internal 10-kΩ pull-up resistor on all SDA and SCL pins are enabled based on respective V_CC voltage
1.08 V to 3.6 V on both A and B ports
V_CC Isolation feature: If either V_CC input is at GND, both ports are in the high-impedance state (excluding pull-ups)
No power-supply sequencing required: either V_CCA or V_CCB can be ramped first
Low I_off of 2.5 µA when either V_CCA or V_CCB = 0 V
OE input can be tied directly to V_CCA or controlled by GPIO
Latch-up performance exceeds 100 mA per JESD 78, class II
ESD Protection exceeds JESD 22
- 2500-V Human-body model (A114-B)
- 1500-V Charged-device model (C101)