CSD22205L
-8V, P channel NexFET™ power MOSFET, single LGA 1.2 mm x 1.2 mm, 9.9 mOhm, gate ESD protection
CSD22205L
- Low resistance
- Small footprint 1.2 mm × 1.2 mm
- Low profile 0.36-mm height
- Lead free
- Gate-source voltage clamp
- Gate ESD protection
- RoHS compliant
- Halogen free
This –8-V, 8.2-mΩ, 1.2-mm × 1.2-mm Land Grid Array (LGA) NexFET™ device has been designed to deliver the lowest on-resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra-low profile. The Land Grid Array (LGA) package is a silicon chip scale package with metal pads instead of solder balls.
Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | CSD22205L –8-V P-Channel NexFET™ Power MOSFET datasheet (Rev. B) | PDF | HTML | 08 Sep 2021 |
Application note | MOSFET Support and Training Tools (Rev. F) | PDF | HTML | 14 Jun 2024 | |
Application note | Semiconductor and IC Package Thermal Metrics (Rev. D) | PDF | HTML | 25 Mar 2024 | |
Application note | Using MOSFET Transient Thermal Impedance Curves In Your Design | PDF | HTML | 18 Dec 2023 | |
Application note | Solving Assembly Issues with Chip Scale Power MOSFETs | PDF | HTML | 14 Dec 2023 | |
Application note | Using MOSFET Safe Operating Area Curves in Your Design | PDF | HTML | 13 Mar 2023 | |
Application brief | Tips for Successfully Paralleling Power MOSFETs | PDF | HTML | 31 May 2022 | |
More literature | WCSP Handling Guide | 07 Nov 2019 | ||
Design guide | FemtoFET Surface Mount Guide (Rev. D) | 07 Jul 2016 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
PICOSTAR (YMG) | 4 | Ultra Librarian |
Ordering & quality
- RoHS
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- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
- Fab location
- Assembly location
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