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XOR (exclusive OR) gates

SN54AC86

ACTIVE

Military 4-ch, 2-input, 2-V to 5.5-V XOR (exclusive OR) gates

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Data sheet

SN54AC86

ACTIVE
Data sheet Order now

Product details

Technology family AC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type Standard CMOS IOH (max) (mA) -24 Output type Push-Pull Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Military Operating temperature range (°C) -55 to 125
Technology family AC Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type Standard CMOS IOH (max) (mA) -24 Output type Push-Pull Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67 CFP (W) 14 58.023 mm² 9.21 x 6.3 LCCC (FK) 20 79.0321 mm² 8.89 x 8.89
  • 2V to 6V VCC operation
  • Inputs accept voltages to 6V
  • Max tpd of 9ns at 5V
  • 2V to 6V VCC operation
  • Inputs accept voltages to 6V
  • Max tpd of 9ns at 5V

The ’AC86 devices are quadruple 2-input exclusive-OR gates. The devices perform the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

The ’AC86 devices are quadruple 2-input exclusive-OR gates. The devices perform the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
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Technical documentation

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Type Title Date
* Data sheet SNx4AC86 Quadruple 2-Input Exclusive-OR Gates datasheet (Rev. D) PDF | HTML 26 Jul 2024
* SMD SN54AC86 SMD 5962-89550 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
More literature HiRel Unitrode Power Management Brochure 07 Jul 2009
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Package Pins CAD symbols, footprints & 3D models
CDIP (J) 14 Ultra Librarian
CFP (W) 14 Ultra Librarian
LCCC (FK) 20 Ultra Librarian
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