Home Logic & voltage translation Configurable & programmable logic ICs Configurable gates
Home
Logic & voltage translation
Configurable & programmable logic ICs
Configurable gates

SN74AUP1G97

ACTIVE

Low-Power Configurable Multiple-Function Gate

Order now
Data sheet

SN74AUP1G97

ACTIVE
Data sheet Order now

Product details

Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 Inputs per channel 1 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Schmitt-Trigger Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AUP Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 3.6 Number of channels 1 Inputs per channel 1 IOL (max) (mA) 4 IOH (max) (mA) -4 Input type Schmitt-Trigger Output type Push-Pull Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YFP) 6 1.4000000000000001 mm² 1 x 1.4000000000000001 DSBGA (YZP) 6 2.1875 mm² 1.75 x 1.25 SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-5X3 (DRL) 6 2.56 mm² 1.6 x 1.6 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1 USON (DRY) 6 1.45 mm² 1.45 x 1 X2SON (DSF) 6 1 mm² 1 x 1
  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption (ICC = 0.9 µA Max)
  • Low Dynamic-Power Consumption (Cpd = 4.8 pF Typ at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typ)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Includes Schmitt-Trigger Inputs
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 5.6 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

NanoStar is a trademark of Texas Instruments
  • Available in the Texas Instruments NanoStar™ Package
  • Low Static-Power Consumption (ICC = 0.9 µA Max)
  • Low Dynamic-Power Consumption (Cpd = 4.8 pF Typ at 3.3 V)
  • Low Input Capacitance (CI = 1.5 pF Typ)
  • Low Noise – Overshoot and Undershoot
    <10% of VCC
  • Ioff Supports Partial-Power-Down Mode Operation
  • Includes Schmitt-Trigger Inputs
  • Wide Operating VCC Range of 0.8 V to 3.6 V
  • Optimized for 3.3-V Operation
  • 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • tpd = 5.6 ns Max at 3.3 V
  • Suitable for Point-to-Point Applications
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Performance Tested Per JESD 22
    • 2000-V Human-Body Model
      (A114-B, Class II)
    • 1000-V Charged-Device Model (C101)

NanoStar is a trademark of Texas Instruments

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

The SN74AUP1G97 features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All inputs can be connected to VCC or GND.

The device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable applications. This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in increased battery life (see Figure 1). This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).

The SN74AUP1G97 features configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All inputs can be connected to VCC or GND.

The device functions as an independent gate with Schmitt-trigger inputs, which allows for slow input transition and better switching-noise immunity at the input.

NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
filter Find other Configurable gates
Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Pin-for-pin with same functionality to the compared device
SN74LVC1G57 ACTIVE Configurable Multiple-Function Gate Larger voltage range (1.65V to 5.5V), higher drive average drive strength (24mA)
SN74LVC1G97 ACTIVE Configurable Multiple-Function Gate Larger voltage range (1.65V to 5.5V), higher drive average drive strength (24mA)

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 8
Type Title Date
* Data sheet SN74AUP1G97 Low-Power Configurable Multiple-Function Gate datasheet (Rev. J) 18 May 2010
Application brief Utilizing Configurable Logic in System Design PDF | HTML 30 Oct 2024
Application brief Understanding Schmitt Triggers (Rev. A) PDF | HTML 22 May 2019
Selection guide Little Logic Guide 2018 (Rev. G) 06 Jul 2018
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note How to Select Little Logic (Rev. A) 26 Jul 2016
More literature SN74LVC1G97 and SN74LVC1G98 Product Clip (Rev. A) 13 Jul 2004
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Simulation model

SN74AUP1G97 IBIS Model (Rev. A)

SCEM398A.ZIP (64 KB) - IBIS Model
Download
Package Pins CAD symbols, footprints & 3D models
DSBGA (YFP) 6 Ultra Librarian
DSBGA (YZP) 6 Ultra Librarian
SOT-23 (DBV) 6 Ultra Librarian
SOT-5X3 (DRL) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian
USON (DRY) 6 Ultra Librarian
X2SON (DSF) 6 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos