Home Logic & voltage translation Flip-flops, latches & registers D-type flip-flops
Home
Logic & voltage translation
Flip-flops, latches & registers
D-type flip-flops

SN74HC175

ACTIVE

Quadruple D-Type Flip-Flops With Clear

Order now
Data sheet

SN74HC175

ACTIVE
Data sheet Order now

Product details

Number of channels 4 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 28 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 85 Rating Catalog
Number of channels 4 Technology family HC Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Input type Standard CMOS Output type Push-Pull Clock frequency (max) (MHz) 28 IOL (max) (mA) 5.2 IOH (max) (mA) -5.2 Supply current (max) (µA) 80 Features Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode Operating temperature range (°C) -40 to 85 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 SSOP (DB) 16 48.36 mm² 6.2 x 7.8 TSSOP (PW) 16 32 mm² 5 x 6.4
  • Wide operating voltage range of 2 V to 6 V
  • Outputs can drive up to 10 LSTTL Loads
  • Low power consumption, 80-µA max ICC
  • Contain four flip-flops with double-rail outputs
  • Typical tpd = 13 ns
  • ±4-mA output drive at 5 V
  • Low input current of 1 µA max
  • Wide operating voltage range of 2 V to 6 V
  • Outputs can drive up to 10 LSTTL Loads
  • Low power consumption, 80-µA max ICC
  • Contain four flip-flops with double-rail outputs
  • Typical tpd = 13 ns
  • ±4-mA output drive at 5 V
  • Low input current of 1 µA max

These positive-edge-triggered D-type flip-flops have a direct clear (CLR) input. The ’HC175 devices feature complementary outputs from each flip-flop.

These positive-edge-triggered D-type flip-flops have a direct clear (CLR) input. The ’HC175 devices feature complementary outputs from each flip-flop.
filter Find other D-type flip-flops
Download View video with transcript Video

Similar products you might be interested in

open-in-new Compare alternates
Same functionality with different pin-out to the compared device
CD74HC173 ACTIVE High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State Outputs Voltage range (2V to 6V), average drive strength (8mA), average propagation delay (20ns)

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 15
Type Title Date
* Data sheet SNx4HC175 Quadruple D-Type Flip-Flops With Clear datasheet (Rev. F) PDF | HTML 24 Jun 2022
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
SSOP (DB) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos