Product details

Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 36 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 220 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 10 Iq per channel (typ) (mA) 0.25 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 0.4 Operating temperature range (°C) -40 to 125 Iout (typ) (mA) 26 2nd harmonic (dBc) 129 3rd harmonic (dBc) 138 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 27 Input bias current (max) (pA) 250000 Features Shutdown CMRR (typ) (dB) 116 Rating Catalog
Number of channels 1 Total supply voltage (+5 V = 5, ±5 V = 10) (min) (V) 2.5 Total supply voltage (+5 V = 5, ±5 V = 10) (max) (V) 5.5 BW at Acl (MHz) 36 Acl, min spec gain (V/V) 1 Slew rate (typ) (V/µs) 220 Architecture Bipolar, Fully Differential ADC Driver Vn at flatband (typ) (nV√Hz) 10 Iq per channel (typ) (mA) 0.25 Rail-to-rail In to V-, Out Vos (offset voltage at 25°C) (max) (mV) 0.4 Operating temperature range (°C) -40 to 125 Iout (typ) (mA) 26 2nd harmonic (dBc) 129 3rd harmonic (dBc) 138 Frequency of harmonic distortion measurement (MHz) 0.001 GBW (typ) (MHz) 27 Input bias current (max) (pA) 250000 Features Shutdown CMRR (typ) (dB) 116 Rating Catalog
SOIC (D) 8 29.4 mm² 4.9 x 6 VSSOP (DGK) 8 14.7 mm² 3 x 4.9 WQFN (RUN) 10 4 mm² 2 x 2
  • Ultra Low-Power:
    • Voltage: 2.5 V to 5.5 V
    • Current: 250 µA
    • Power-Down Mode: 0.5 µA (Typical)
  • Fully Differential Architecture
  • Bandwidth: 36 MHz (Av = 1 V/V)
  • Slew Rate: 200 V/µs
  • THD: –120 dBc at 1 kHz (1 VRMS, RL= 2 kΩ)
  • Input Voltage Noise: 10 nV/√Hz (f = 1 kHz)
  • High DC Accuracy:
    • VOS: ±100 µV
    • VOS Drift: ±3 µV/˚C (–40°C to +125°C)
    • AOL: 114 dB
  • Rail-to-Rail Output (RRO)
  • Negative Rail Input (NRI)
  • Output Common-Mode Control
  • 8-Pin SOIC (D) and VSSOP (DGK)
  • 10-Pin WQFN (RUN)
  • Ultra Low-Power:
    • Voltage: 2.5 V to 5.5 V
    • Current: 250 µA
    • Power-Down Mode: 0.5 µA (Typical)
  • Fully Differential Architecture
  • Bandwidth: 36 MHz (Av = 1 V/V)
  • Slew Rate: 200 V/µs
  • THD: –120 dBc at 1 kHz (1 VRMS, RL= 2 kΩ)
  • Input Voltage Noise: 10 nV/√Hz (f = 1 kHz)
  • High DC Accuracy:
    • VOS: ±100 µV
    • VOS Drift: ±3 µV/˚C (–40°C to +125°C)
    • AOL: 114 dB
  • Rail-to-Rail Output (RRO)
  • Negative Rail Input (NRI)
  • Output Common-Mode Control
  • 8-Pin SOIC (D) and VSSOP (DGK)
  • 10-Pin WQFN (RUN)

The THS4531A device is a low-power, fully differential amplifier with input common-mode range below the negative rail and rail-to-rail output. The device is designed for low-power data acquisition systems and high-density applications where power consumption and dissipation is critical.

The device features accurate output common-mode control that allows for DC coupling when driving analog-to-digital converters (ADCs). This control, coupled with the input common-mode range below the negative rail and rail-to-rail output, allows for easy interface from single-ended ground-referenced signal sources to successive-approximation registers (SARs), and delta-sigma (ΔΣ) ADCs using only single-supply 2.5-V to 5-V power. The THS4531A is also a valuable tool for general-purpose, low-power differential signal conditioning applications.

The THS4531A device is a low-power, fully differential amplifier with input common-mode range below the negative rail and rail-to-rail output. The device is designed for low-power data acquisition systems and high-density applications where power consumption and dissipation is critical.

The device features accurate output common-mode control that allows for DC coupling when driving analog-to-digital converters (ADCs). This control, coupled with the input common-mode range below the negative rail and rail-to-rail output, allows for easy interface from single-ended ground-referenced signal sources to successive-approximation registers (SARs), and delta-sigma (ΔΣ) ADCs using only single-supply 2.5-V to 5-V power. The THS4531A is also a valuable tool for general-purpose, low-power differential signal conditioning applications.

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      Type Title Date
      * Data sheet THS4531A Ultra Low-Power, Rail-to-Rail Output, Fully Differential Amplifier datasheet (Rev. D) PDF | HTML 04 Mar 2020
      Product overview Pairing ADC Drivers With Fully-Differential Input ADCs for Wide Bandwidth Data Acquisition 01 Apr 2024
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      E-book The Signal e-book: A compendium of blog posts on op amp design topics 28 Mar 2017
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      EVM User's guide THS4531ADGKEVM Evaluation Module 05 Dec 2012
      Analog Design Journal Using fully differential op amps as attenuators, Part 3 04 Oct 2009
      Analog Design Journal Using fully differential op amps as attenuators, Part 2 14 Jul 2009
      Analog Design Journal Using fully differential op amps as attenuators, Part 1 01 May 2009
      Analog Design Journal Analysis of fully differential amplifiers 11 Mar 2005
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      Design & development

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      PSPICE-FOR-TI — PSpice® for TI design and simulation tool

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      Package Pins CAD symbols, footprints & 3D models
      SOIC (D) 8 Ultra Librarian
      VSSOP (DGK) 8 Ultra Librarian
      WQFN (RUN) 10 Ultra Librarian

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