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TPS7A80

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1-A, high-PSRR, ultra-low-dropout voltage regulator with low-IQ & enable

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TLV759P ACTIVE 1-A, low-IQ, high-accuracy, adjustable ultra-low-dropout voltage regulator with enable 1-A single-channel adjustable-output LDO regulator with lower IQ for cost-sensitive applications.
TPS7A88 ACTIVE 1-A, low-noise, high-PSRR, dual-channel adjustable ultra-low-dropout voltage regulator Dual-channel, low-noise, 1-A LDO regulator.
TPS7A91 ACTIVE 1-A, low-noise, high-PSRR, adjustable ultra-low-dropout voltage regulator with high-accuracy Next-generation product with lower noise and lower dropout.

TPS7A80

ACTIVE
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Product details

Output options Adjustable Output, Fixed Output Iout (max) (A) 1 Vin (max) (V) 6.5 Vin (min) (V) 2.2 Vout (max) (V) 6 Vout (min) (V) 0.8 Fixed output options (V) 1.2, 1.8, 3.3, 5 Noise (µVrms) 50 Iq (typ) (mA) 0.06 Thermal resistance θJA (°C/W) 48 Rating Catalog Load capacitance (min) (µF) 4.7 Regulated outputs (#) 1 Features Enable Accuracy (%) 3 PSRR at 100 KHz (dB) 57 Dropout voltage (Vdo) (typ) (mV) 170 Operating temperature range (°C) -40 to 125
Output options Adjustable Output, Fixed Output Iout (max) (A) 1 Vin (max) (V) 6.5 Vin (min) (V) 2.2 Vout (max) (V) 6 Vout (min) (V) 0.8 Fixed output options (V) 1.2, 1.8, 3.3, 5 Noise (µVrms) 50 Iq (typ) (mA) 0.06 Thermal resistance θJA (°C/W) 48 Rating Catalog Load capacitance (min) (µF) 4.7 Regulated outputs (#) 1 Features Enable Accuracy (%) 3 PSRR at 100 KHz (dB) 57 Dropout voltage (Vdo) (typ) (mV) 170 Operating temperature range (°C) -40 to 125
VSON (DRB) 8 9 mm² 3 x 3
  • Low-Dropout 1-A Regulator With Enable
  • Adjustable Output Voltages: 0.8 V to 6 V
  • Fixed Output Voltages: 0.8 V to 6 V
  • Wide-Bandwidth High PSRR:
    • 63 dB at 1 kHz
    • 57 dB at 100 kHz
    • 38 dB at 1 MHz
  • Low Noise: (14 × VOUT ) µVRMS Typical (100 Hz to 100 kHz)
  • Stable with a 4.7-µF Ceramic Capacitor
  • Excellent Load/Line Transient Response
  • 3% Overall Accuracy (Over Load/Line/Temp)
  • Overcurrent and Overtemperature Protection
  • Very Low Dropout: 170 mV Typical at 1 A
  • 3-mm × 3-mm VSON-8 DRB Package
  • Low-Dropout 1-A Regulator With Enable
  • Adjustable Output Voltages: 0.8 V to 6 V
  • Fixed Output Voltages: 0.8 V to 6 V
  • Wide-Bandwidth High PSRR:
    • 63 dB at 1 kHz
    • 57 dB at 100 kHz
    • 38 dB at 1 MHz
  • Low Noise: (14 × VOUT ) µVRMS Typical (100 Hz to 100 kHz)
  • Stable with a 4.7-µF Ceramic Capacitor
  • Excellent Load/Line Transient Response
  • 3% Overall Accuracy (Over Load/Line/Temp)
  • Overcurrent and Overtemperature Protection
  • Very Low Dropout: 170 mV Typical at 1 A
  • 3-mm × 3-mm VSON-8 DRB Package

The TPS7A80 family of low-dropout linear regulators (LDOs) offer very high power-supply ripple rejection (PSRR) at the output. This LDO family uses an advanced BiCMOS process and a PMOSFET pass device to achieve very low noise, excellent transient response, and excellent PSRR performance.

The TPS7A80 family is stable with a 4.7-µF ceramic output capacitor, and uses a precision voltage reference and feedback loop to achieve a worst-case accuracy of 3% over all load, line, process, and temperature variations.

This family is fully specified over the temperature range of TJ = –40°C to +125°C, and is offered in a 3-mm × 3-mm, VSON-8 package with a thermal pad.

The TPS7A80 family of low-dropout linear regulators (LDOs) offer very high power-supply ripple rejection (PSRR) at the output. This LDO family uses an advanced BiCMOS process and a PMOSFET pass device to achieve very low noise, excellent transient response, and excellent PSRR performance.

The TPS7A80 family is stable with a 4.7-µF ceramic output capacitor, and uses a precision voltage reference and feedback loop to achieve a worst-case accuracy of 3% over all load, line, process, and temperature variations.

This family is fully specified over the temperature range of TJ = –40°C to +125°C, and is offered in a 3-mm × 3-mm, VSON-8 package with a thermal pad.
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Technical documentation

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Type Title Date
* Data sheet TPS7A80 Low-Noise, Wide-Bandwidth, High PSRR, Low-Dropout 1-A Linear Regulator datasheet (Rev. J) PDF | HTML 18 Jan 2018
White paper Parallel LDO Architecture Design Using Ballast Resistors PDF | HTML 14 Dec 2022
White paper Comprehensive Analysis and Universal Equations for Parallel LDO's Using Ballast PDF | HTML 13 Dec 2022
Application note A Topical Index of TI LDO Application Notes (Rev. F) 27 Jun 2019
Selection guide Low Dropout Regulators Quick Reference Guide (Rev. P) 21 Mar 2018
User guide TSW2200 Multi-Output Power Supply Board (Rev. A) 13 Dec 2012
Application note LDO Performance Near Dropout 08 Oct 2010
EVM User's guide TPS7A80xxDRBEVM User's Guide 14 Jul 2010

Design & development

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Evaluation board

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The LMK03318EVM evaluation module provides a complete clocking platform to evaluate the 100-fs RMS jitter performance and pin-/software-configuration modes and features of the Texas Instruments LMK03318 Ultra-Low-Jitter Clock Generator with 1 PLL, 8 outputs, 2 inputs, and integrated EEPROM.

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Evaluation board

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User guide: PDF
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Evaluation board

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User guide: PDF
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Simulation model

TPS7A8001 PSpice Transient Model (Rev. A)

SBVM298A.ZIP (23 KB) - PSpice Model
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Simulation model

TPS7A8001 Unencrypted PSpice Transient Model

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Simulation model

TPS7A8012 PSpice Transient Model

SBVM884.ZIP (40 KB) - PSpice Model
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Simulation model

TPS7A8012 Unencrypted PSpice Transient Model

SBVM888.ZIP (2 KB) - PSpice Model
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Simulation model

TPS7A8018 PSpice Transient Model

SBVM890.ZIP (40 KB) - PSpice Model
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Simulation model

TPS7A8018 Unencrypted PSpice Transient Model

SBVM886.ZIP (2 KB) - PSpice Model
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Simulation model

TPS7A8033 PSpice Transient Model

SBVM883.ZIP (40 KB) - PSpice Model
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TPS7A8033 Unencrypted PSpice Transient Model

SBVM887.ZIP (2 KB) - PSpice Model
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Simulation model

TPS7A8050 PSpice Transient Model

SBVM889.ZIP (40 KB) - PSpice Model
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Simulation model

TPS7A8050 Unencrypted PSpice Transient Model

SBVM885.ZIP (2 KB) - PSpice Model
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