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UCC27517

ACTIVE

4-A/4-A single-channel gate driver with 5-V UVLO and 13-ns prop delay in SOT-23 package

Product details

Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
Number of channels 1 Power switch GaNFET, IGBT, MOSFET Peak output current (A) 4 Input supply voltage (min) (V) 4.5 Input supply voltage (max) (V) 18 Features Hysteretic Logic Operating temperature range (°C) -40 to 140 Rise time (ns) 9 Fall time (ns) 7 Propagation delay time (µs) 0.013 Input threshold CMOS, TTL Channel input logic Inverting, Non-Inverting Input negative voltage (V) 0 Rating Catalog Undervoltage lockout (typ) (V) 4 Driver configuration Inverting, Non-Inverting
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8
  • Low-Cost Gate-Driver Device Offering Superior Replacement
    of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and 4-A Peak-Sink Symmetrical Drive
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (9-ns and 7-ns Typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (Ensures Glitch-Free
    Operation at Power Up and Power Down)
  • TTL and CMOS Compatible Input-Logic Threshold (Independent
    of Supply Voltage)
  • Hysteretic-Logic Thresholds for High-Noise Immunity
  • Dual Input Design (Choice of an Inverting (IN– pin) or
    Noninverting (IN+ Pin) Driver Configuration)
    • Unused Input Pin Can Be Used for Enable or Disable Function
  • Output Held Low When Input Pins Are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted
    by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV (SOT-23) and 6-Pin DRS (3-mm ×
    3-mm WSON With Exposed Thermal Pad) Package Options
  • Low-Cost Gate-Driver Device Offering Superior Replacement
    of NPN and PNP Discrete Solutions
  • 4-A Peak-Source and 4-A Peak-Sink Symmetrical Drive
  • Fast Propagation Delays (13-ns Typical)
  • Fast Rise and Fall Times (9-ns and 7-ns Typical)
  • 4.5 to 18-V Single-Supply Range
  • Outputs Held Low During VDD UVLO (Ensures Glitch-Free
    Operation at Power Up and Power Down)
  • TTL and CMOS Compatible Input-Logic Threshold (Independent
    of Supply Voltage)
  • Hysteretic-Logic Thresholds for High-Noise Immunity
  • Dual Input Design (Choice of an Inverting (IN– pin) or
    Noninverting (IN+ Pin) Driver Configuration)
    • Unused Input Pin Can Be Used for Enable or Disable Function
  • Output Held Low When Input Pins Are Floating
  • Input Pin Absolute Maximum Voltage Levels Not Restricted
    by VDD Pin Bias Supply Voltage
  • Operating Temperature Range of –40°C to 140°C
  • 5-Pin DBV (SOT-23) and 6-Pin DRS (3-mm ×
    3-mm WSON With Exposed Thermal Pad) Package Options

The UCC27516 and UCC27517 single-channel, high-speed, low-side gate driver devices can effectively drive MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27516 and UCC27517 can source and sink high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay, typically 13 ns.

The UCC27516 and UCC27517 provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27516 and UCC27517 are designed to operate over a wide VDD range of 4.5 to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on the VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

The UCC27516 and UCC27517 devices feature a dual-input design which offers flexibility of implementing both inverting (IN– pin) and noninverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For safety purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27516 and UCC27517 devices are based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

The UCC27516 and UCC27517 single-channel, high-speed, low-side gate driver devices can effectively drive MOSFET and IGBT power switches. Using a design that inherently minimizes shoot-through current, UCC27516 and UCC27517 can source and sink high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay, typically 13 ns.

The UCC27516 and UCC27517 provides 4-A source, 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.

The UCC27516 and UCC27517 are designed to operate over a wide VDD range of 4.5 to 18 V and wide temperature range of –40°C to 140°C. Internal undervoltage lockout (UVLO) circuitry on the VDD pin holds output low outside VDD operating range. The capability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power semiconductor devices.

The UCC27516 and UCC27517 devices feature a dual-input design which offers flexibility of implementing both inverting (IN– pin) and noninverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin can be used to control the state of the driver output. The unused input pin can be used for enable and disable function. For safety purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.

The input pin threshold of the UCC27516 and UCC27517 devices are based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.

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Technical documentation

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Type Title Date
* Data sheet UCC2751x Single-Channel, High-Speed, Low-Side Gate Driver (With 4-A Peak Source and 4-A Peak Sink) datasheet (Rev. D) PDF | HTML 31 Dec 2014
Application note Selecting Gate Drivers for HVAC Systems PDF | HTML 04 Apr 2024
Technical article GaN 開關整合如何在 PFC 中實現低 THD 與高效率 PDF | HTML 21 Mar 2024
Technical article GaN 스위치 통합으로 PFC에서 낮은 THD와 높은 효율성을 구현하 는 방법 PDF | HTML 21 Mar 2024
Technical article How GaN switch integration enables low THD and high efficiency in PFC PDF | HTML 21 Feb 2024
Application note Benefits of a Compact, Powerful, and Robust Low-Side Gate Driver PDF | HTML 10 Nov 2021
E-book Ein Techniker-Leitfaden für Industrieroboter-Designs 25 Mar 2020
Application brief External Gate Resistor Selection Guide (Rev. A) 28 Feb 2020
Application brief Understanding Peak IOH and IOL Currents (Rev. A) 28 Feb 2020
E-book E-book: An engineer’s guide to industrial robot designs 12 Feb 2020
Application brief How to overcome negative voltage transients on low-side gate drivers' inputs 18 Jan 2019
More literature Fundamentals of MOSFET and IGBT Gate Driver Circuits (Replaces SLUP169) (Rev. A) 29 Oct 2018
Application brief Enable Function with Unused Differential Input 11 Jul 2018
Selection guide Power Management Guide 2018 (Rev. R) 25 Jun 2018
Application brief Low-Side Gate Drivers With UVLO Versus BJT Totem-Pole 16 Mar 2018
Technical article A bite-size gate drive: replacing BJTs with an integrated solution PDF | HTML 30 Nov 2017
More literature Design Review of a Full-Featured 350-W Offline Power Converter 29 Oct 2013

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

UCD3138PFCEVM-026 — UCD3138 Digital Power Factor Correction Pre-regulator Evaluation Module

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User guide: PDF | HTML
Not available on TI.com
Simulation model

UCC27517 PSpice Transient Model (Rev. B)

SLUM286B.ZIP (51 KB) - PSpice Model
Simulation model

UCC27517 TINA-TI Transient Reference Design

SLUM317.TSC (67 KB) - TINA-TI Reference Design
Simulation model

UCC27517 TINA-TI Transient Spice Model

SLUM318.ZIP (8 KB) - TINA-TI Spice Model
Simulation model

UCC27517 Unencrypted PSpice Transient Model

SLUM491.ZIP (2 KB) - PSpice Model
Calculation tool

SLURB28 UCC27516 and UCC27517 Schematic Review Template

Supported products & hardware

Supported products & hardware

Products
Low-side drivers
UCC27516 4-A/4-A single-channel gate driver with 5-V UVLO and 13-ns prop delay in SON package UCC27517 4-A/4-A single-channel gate driver with 5-V UVLO and 13-ns prop delay in SOT-23 package
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
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Schematic: PDF
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Test report: PDF
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Test report: PDF
Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 5 Ultra Librarian

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