UCC27524A
5-A/5-A dual-channel gate driver with 5-V UVLO, enable, and negative input voltage handling
A newer version of this product is available
UCC27524A
- Industry-standard pin out
- Two independent gate-drive channels
- 5A peak source and sink-drive current
- Independent-enable function for each output
- TTL and CMOS compatible logic threshold independent of supply voltage
- Hysteretic-logic thresholds for high noise immunity
- Ability to handle negative voltages (–5V) at inputs
- Inputs and enable pin-voltage levels not restricted by VDD pin bias supply voltage
- 4.5V to 18V single-supply range
- Outputs held low during VDD-UVLO (ensures glitch-free operation at power up and power down)
- Fast propagation delays (17ns typical)
- Fast rise and fall times (6ns and 10ns typical)
- 1ns typical delay matching between 2-channels
- Two outputs are paralleled for higher drive current
- Outputs held in low when inputs floating
- SOIC-8, HVSSOP-8 PowerPAD™ package options
- Operating junction temperature range of –40 to 150°C
The UCC27524A device is a dual-channel, high-speed, low-side, gate-driver device capable of effectively driving MOSFET and IGBT power switches. The UCC27524A is a variant of the UCC2752x family. The UCC27524A adds the ability to handle –5V directly at the input pins for increased robustness. The UCC27524A is a dual non-inverting driver. Using a design that inherently minimizes shoot-through current, the UCC27524A is capable of delivering high-peak current pulses of up to 5A source and 5A sink into capacitive loads along with rail-to-rail drive capability and extremely small propagation delay typically 17ns. In addition, the drivers feature matched internal propagation delays between the two channels which are very well suited for applications requiring dual-gate drives with critical timing, such as synchronous rectifiers. This also enables connecting two channels in parallel to effectively increase current-drive capability or driving two switches in parallel with a single input signal. The input pin thresholds are based on TTL and CMOS compatible low-voltage logic, which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
Technical documentation
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
UCC27423-4-5-Q1EVM — UCC2742xQ1 Dual 4-A High-Speed Low-Side MOSFET Drivers With Enable Evaluation Module (EVM)
UCC27714EVM-551 — UCC27714 600W Phase Shifted Full Bridge Converter Evaluation Module
This 600W EVM was designed to demonstrate how the UCC28950 control IC, UCC27524A and UCC27714 gate drivers could be used in a phase shifted full bridge converter that achieves ZVS from 50 to 100% load.
UCC27524 TINA-TI Transient Reference Design
PSPICE-FOR-TI — PSpice® for TI design and simulation tool
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TIDA-01512 — PMBus Voltage Regulator Reference Design for NXP QorIQ LS2085A/88A Processors
The dual outputs of the controller target the 60-ATDC, 1.0-V core rail with a four-phase design and a 30-ATDC, (...)
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
HVSSOP (DGN) | 8 | Ultra Librarian |
SOIC (D) | 8 | Ultra Librarian |
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