Conversion start A (CONVSTA) and conversion start B (CONVSTB) are active-high, conversion control digital input signals. CONVSTA can be used to simultaneously sample and initiate the conversion process for the first half count of device input channels (channels 1-4), whereas CONVSTB can be used to simultaneously sample and initiate the conversion process for the latter half count of device input channels (channels 5-8). For simultaneous sampling of all input channels, both pins can be shorted together and a single CONVST signal can be used to control the conversion on all input channels. However, in the oversampling mode of operation (see the Oversampling Mode of Operation section), both the CONVSTA and CONVSTB signals must be tied together.

On the rising edge of the CONVSTA, CONVSTB signals, the internal track-and-hold circuits for each analog input channel are placed into hold mode and the sampled input signal is converted using an internal clock. The CONVSTA, CONVSTB signals can be pulled low when the internal conversion is over, as indicated by the BUSY signal (see the BUSY (Output) section). At this point, the front-end circuit for all analog input channels acquires the respective input signals and the internal ADC is not converting. The output data can be read from the device irrespective of the status of the CONVSTA, CONVSTB pins, as there is no degradation in device performance, as explained in the Data Read Operation section.