The TPS26750 is a fully-integrated USB Power Delivery (USB-PD) management device providing cable plug and orientation detection for USB Type-C and PD receptacles. The TPS26750 communicates with the cable and another USB Type-C and PD device at the opposite end of the cable. The device also enables integrated port power switch for sourcing, and controls a high current port power switch for sinking.

The TPS26750 is divided into several main sections:

• USB-PD controller
• Cable plug and orientation detection circuitry
• Port power switches
• Power management circuitry
• Digital core

The USB-PD controller provides the physical layer (PHY) functionality of the USB-PD protocol. The USB-PD data is output through either the CC1 pin or the CC2 pin, depending on the orientation of the reversible USB Type-C cable. For a high-level block diagram of the USB-PD physical layer, a description of its features, and more detailed circuitry, see USB-PD Physical Layer.

The cable plug and orientation detection analog circuitry automatically detects a USB Type-C cable plug insertion the cable orientation. For a high-level block diagram of cable plug and orientation detection, a description of its features, and more detailed circuitry, see Cable Plug and Orientation Detection.

The port power switches provide power to the VBUS pin and CC1 or CC2 pins based on the detected plug orientation. For a high-level block diagram of the port power switches, a description of its features, and more detailed circuitry, see Power Paths.

The power management circuitry receives and provides power to the TPS26750 internal circuitry and LDO_3V3 output. See Power Management for more information.

The digital core provides the engine for receiving, processing, and sending all USB-PD packets as well as handling control of all other TPS26750 functionality. A portion of the digital core contains ROM memory, which contains all the necessary firmware required to execute Type-C and PD applications. In addition, a section of the ROM, called boot code, is capable of initializing the TPS26750, loading of the device configuration information, and loading any code patches into volatile memory in the digital core. For a high-level block diagram of the digital core, a description of its features, and more detailed circuitry, see Digital Core.

The TPS26750 has one I²C controller to write to and read from external target devices such as a battery charger or an optional external EEPROM memory (see I2C Interface).

The TPS26750 also integrates a thermal shutdown mechanism and runs off of accurate clocks provided by the integrated oscillator.