SLVSH95 July 2024 TPS546C25
ADVANCE INFORMATION
CMD Address | D8h |
Write Transaction: | Write Word |
Read Transaction: | Read Word |
Format: | Unsigned Binary (2 bytes) |
NVM Back-up: | EEPROM |
Updates: | On-the-fly |
This register contains bits for overriding selected functions that can be set through NVM or Pinstrapping. Pin programmed values override NVM values (DEFAULT or USER STORE). Setting a "1" in each bit of this register will allow DEFAULT or USER STORE values instead of the Pin-Programmed value associated with that bit.
In order for an override bit to take effect (become activated), the user has to write the bit, store to EEPROM, and power-cycle the part.
Return to Supported PMBus Commands.
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
R/W | R | R/W | R/W | R/W | R/W | R/W | R/W |
OVRD_STACK | 0 | 0 | 0 | OVRD_SS | OVRD_FLT_R_ESP | OVRD_PMB_ADDR | 0 |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W |
0 | OVRD_MODE | OVRD_FSW | OVRD_RAMP | OVRD_GAIN | OVRD_OCL | 0 | OVRD_VSEL |
LEGEND: R/W = Read/Write; R = Read only |
Bit | Field | Access | Reset | Description |
---|---|---|---|---|
15 | OVRD_STACK | R/W | NVM |
0b: Pinstrap results for (D6h) STACK_CONFIG are ignored. The device operates as a Primary, Single Phase device. 1b: Pinstrap results determine the Primary / Secondary configuration and (D6h) STACK_CONFIG value. |
14:12 | 0 | R | 0b | Not supported and always set to 0. Attempts to write to this bit will be ignored. |
13:12 | 0 | R/W | 00b | Not supported and always set to 0. |
11 | OVRD_SS | R/W | NVM | Override soft-start pinstrap value. 0b: Pinstrap results for TON_RISE are ignored. The values from NVM remain in effect until values are written to the TON_RISE register. 1b: Pinstrap results determine the soft-start value. |
10 | OVRD_FLT_RESP | R/W | NVM | Override fault response pinstrap value. 0b: PinStrap results for FAULT_RESPONSE are ignored. The values from NVM remain in effect until values are written to the VOUT_OV_FAULT_RESPONSE, VOUT_UV_FAULT_RESPONSE, or OT_FAULT_RESPONSE registers. 1b: Pinstrap results determine the fault response. |
9 | OVRD_PMB_ADDR | R/W | NVM | Override PMBus Address pinstrap value. 0b: PinStrap results for PMBus_ADDR are ignored. The values from NVM remain in effect until values are written to the PMBus_ADDR register. 1b: Pinstrap results determine the PMBus Address value. |
8:7 | 0 | R/W | 00b | Not supported and always set to 0. |
6 | OVRD_MODE | R/W | NVM | Override Mode pinstrap value. 0b: PinStrap results or FCCM/DCM light load operation are ignored. The values from NVM remain in effect until values are written to the SYS_CFG_USER1 register. 1b: Pinstrap results determine the Mode value. |
5 | OVRD_FSW | R/W | NVM | Override Frequency Switch pinstrap value. 0b: PinStrap results for FREQUENCY_SWITCH are ignored. The values from NVM remain in effect until values are written to the FREQUENCY_SWITCH register. 1b: Pinstrap results determine the Frequency Switch value. |
4 | OVRD_RAMP | R/W | NVM | Override RAMP pinstrap value. 0b: PinStrap results for COMP are ignored. The values from NVM remain in effect until values are written to the COMP register. 1b: Pinstrap results determine the RAMP value. |
3 | OVRD_GAIN | R/W | NVM | Override GAIN pinstrap value. 0b: PinStrap results obtained from Pin pinstrapping operation are ignored. The values from NVM remain in effect until values are written to the COMP register. 1b: Pinstrap results determine the RAMP and GAIN values. |
2 | OVRD_OCL | R/W | NVM | Override Overcurrent Limit (OCL) pinstrap value. 0b: PinStrap results IOUT_OC_FAULT_LIMIT are ignored. The values from NVM remain in effect until values are written to the IOUT_OC_FAULT_LIMIT register. 1b: Pinstrap results determine the OCL value. |
1 | 0 | R/W | NVM | Not supported and always set to 0. |
0 | OVRD_VSEL | R/W | NVM | Override VSEL pinstrap value. 0b: PinStrap results for VSEL are ignored. The values from NVM remain in effect until values are written to the VBOOT_1, VOUT_SCALE_LOOP, VOUT_COMMAND, VOUT_MAX, or VOUT_MIN registers. 1b: Pinstrap results determine the VSEL value. Ignored if external resistor divider is chosen. |