SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The AES module comprises registers that exist at an offset relative to the AES Module base address and a small set of AES µDMA registers that exist at an offset relative to an Encryption Control Module base address.
The AES module register offsets are relative to the base address 0x44036000.
Table 9-5 lists the memory-mapped registers for the AES. All register offset addresses not listed in Table 9-5 should be considered as reserved locations and the register contents should not be modified.
| Offset | Acronym | Register Name | Section |
|---|---|---|---|
| 0x000 | AES_KEY2_6 | AES Key 2_6 | Section 9.5.1 |
| 0x004 | AES_KEY2_7 | AES Key 2_7 | Section 9.5.1 |
| 0x008 | AES_KEY2_4 | AES Key 2_4 | Section 9.5.1 |
| 0x00C | AES_KEY2_5 | AES Key 2_5 | Section 9.5.1 |
| 0x010 | AES_KEY2_2 | AES Key 2_2 | Section 9.5.1 |
| 0x014 | AES_KEY2_3 | AES Key 2_3 | Section 9.5.1 |
| 0x018 | AES_KEY2_0 | AES Key 2_0 | Section 9.5.1 |
| 0x01C | AES_KEY2_1 | AES Key 2_1 | Section 9.5.1 |
| 0x020 | AES_KEY1_6 | AES Key 1_6 | Section 9.5.1 |
| 0x024 | AES_KEY1_7 | AES Key 1_7 | Section 9.5.1 |
| 0x028 | AES_KEY1_4 | AES Key 1_4 | Section 9.5.1 |
| 0x02C | AES_KEY1_5 | AES Key 1_5 | Section 9.5.1 |
| 0x030 | AES_KEY1_2 | AES Key 1_2 | Section 9.5.1 |
| 0x034 | AES_KEY1_3 | AES Key 1_3 | Section 9.5.1 |
| 0x038 | AES_KEY1_0 | AES Key 1_0 | Section 9.5.1 |
| 0x03C | AES_KEY1_1 | AES Key 1_1 | Section 9.5.1 |
| 0x40 to 0x4C | AES_IV_IN_0 to
AES_IV_IN_3 |
AES Initialization Vector Input 0 to
AES Initialization Vector Input 3 |
Section 9.5.2 |
| 0x50 | AES_CTRL | AES Control | Section 9.5.3 |
| 0x54 to 0x58 | AES_C_LENGTH_0 to
AES_C_LENGTH_1 |
AES Crypto Data Length 0 to
AES Crypto Data Length 1 |
Section 9.5.4 |
| 0x5C | AES_AUTH_LENGTH | AES Authentication Data Length | Section 9.5.5 |
| 0x60 to 0x6C | AES_DATA_IN_0 to
AES_DATA_IN_3 |
AES Data R/W Plaintext/Ciphertext 0 to
AES Data R/W Plaintext/Ciphertext 3 |
Section 9.5.6 |
| 0x70 to 0x7C | AES_TAG_OUT_0 to
AES_TAG_OUT_3 |
AES Hash Tag Out 0 to
AES Hash Tag Out 3 |
Section 9.5.7 |
| 0x80 | AES_REVISION | AES IP Revision Identifier | Section 9.5.8 |
| 0x84 | AES_SYSCONFIG | AES System Configuration | Section 9.5.9 |
| 0x88 | AES_SYSSTATUS | AES System Status | Section 9.5.10 |
| 0x8C | AES_IRQSTATUS | AES Interrupt Status | Section 9.5.11 |
| 0x90 | AES_IRQENABLE | AES Interrupt Enable | Section 9.5.12 |
| 0x94 | AES_DIRTYBITS | AES Dirty Bits | Section 9.5.13 |
Complex bit access types are encoded to fit into small table cells. Table 9-6 shows the codes that are used for access types in this section.
| Access Type | Code | Description |
|---|---|---|
| Read Type | ||
| R | R | Read |
| Write Type | ||
| W | W | Write |
| W1C | 1C
W |
1 to clear
Write |
| Reset or Default Value | ||
| -n | Value after reset or the default value | |