The output stages of the UCC53x0 family feature a pull-up structure that delivers the highest peak-source current when it is most needed which is during the Miller plateau region of the power-switch turn-on transition (when the power-switch drain or collector voltage experiences dV/dt). The output stage pull-up structure features a P-channel MOSFET and an additional pull-up N-channel MOSFET in parallel. The function of the N-channel MOSFET is to provide a brief boost in the peak-sourcing current, which enables fast turn-on. Fast turn-on is accomplished by briefly turning on the N-channel MOSFET during a narrow instant when the output is changing states from low to high. Table 8-1 lists the typical internal resistance values of the pull-up and pull-down structure.

The R_OH parameter is a DC measurement and is representative of the on-resistance of the P-channel device only. This parameter is only for the P-channel device, because the pull-up N-channel device is held in the OFF state in DC condition and is turned on only for a brief instant when the output is changing states from low to high. Therefore, the effective resistance of the UCC53x0 pull-up stage during this brief turn-on phase is much lower than what is represented by the R_OH parameter, which yields a faster turn-on. The turn-on-phase output resistance is the parallel combination R_OH || R_NMOS.

The pull-down structure in the UCC53x0 S and E versions is simply composed of an N-channel MOSFET. For the M version, an additional FET is connected in parallel with the pull-down structure when the CLAMP and OUT pins are connected to the gate of the IGBT or MOSFET. The output voltage swing between V_CC2 and V_EE2 provides rail-to-rail operation.

Figure 8-6 Output Stage—S Version

Figure 8-7 Output Stage—E Version

Figure 8-8 Output Stage—M Version