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LP2997

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DDR-II 终止稳压器

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数据表

LP2997

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数据表 立即订购

米6体育平台手机版_好二三四详情

Vin (min) (V) 1.8 Vin (max) (V) 5.5 Vout (min) (V) 0.822 Vout (max) (V) 0.887 Features Shutdown Pin for S3 Iq (typ) (mA) 0.32 Rating Catalog Operating temperature range (°C) 0 to 125 Product type DDR DDR memory type DDR2
Vin (min) (V) 1.8 Vin (max) (V) 5.5 Vout (min) (V) 0.822 Vout (max) (V) 0.887 Features Shutdown Pin for S3 Iq (typ) (mA) 0.32 Rating Catalog Operating temperature range (°C) 0 to 125 Product type DDR DDR memory type DDR2
HSOIC (DDA) 8 29.4 mm² 4.9 x 6 SOIC (D) 8 29.4 mm² 4.9 x 6
  • Source and Sink Current
  • Low Output Voltage Offset
  • No External Resistors Required
  • Linear Topology
  • Suspend to Ram (STR) Functionality
  • Low External Component Count
  • Thermal Shutdown
  • Available in SOIC-8, SO PowerPAD-8 Packages

All trademarks are the property of their respective owners.

  • Source and Sink Current
  • Low Output Voltage Offset
  • No External Resistors Required
  • Linear Topology
  • Suspend to Ram (STR) Functionality
  • Low External Component Count
  • Thermal Shutdown
  • Available in SOIC-8, SO PowerPAD-8 Packages

All trademarks are the property of their respective owners.

The LP2997 linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500mA continuous current and transient peaks up to 900mA in the application as required for DDR-II SDRAM termination. The LP2997 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

An additional feature found on the LP2997 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.

The LP2997 linear regulator is designed to meet the JEDEC SSTL-18 specifications for termination of DDR-II memory. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 500mA continuous current and transient peaks up to 900mA in the application as required for DDR-II SDRAM termination. The LP2997 also incorporates a VSENSE pin to provide superior load regulation and a VREF output as a reference for the chipset and DIMMs.

An additional feature found on the LP2997 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. When SD is pulled low the VTT output will tri-state providing a high impedance output, but, VREF will remain active. A power savings advantage can be obtained in this mode through lower quiescent current.
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LP2996-N 正在供货 具有 DDR2 关断引脚的 1.5A DDR 终端稳压器 DDR-I And DDR-II Linear Termination Regulator

技术文档

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类型 标题 下载最新的英语版本 日期
* 数据表 LP2997 DDR-II Termination Regulator 数据表 (Rev. F) 2013年 4月 4日
应用手册 Limiting DDR Termination Regulators’ Inrush Current 2016年 8月 23日
应用手册 AN-1254 DDR-SDRAM Termination Simplified Using a Linear Regulator (Rev. A) 2013年 5月 6日

设计和开发

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仿真模型

LP2997 PSpice Transient Model

SNVMAH7.ZIP (70 KB) - PSpice Model
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仿真模型

LP2997 Unencrypted PSpice Transient Model

SNVMAH8.ZIP (4 KB) - PSpice Model
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参考设计

TIDA-010011 — 适用于保护继电器处理器模块的高效电源架构参考设计

This reference design showcases various power architectures for generating multiple voltage rails for an application processor module, requiring >1A load current and high efficiency . The required power supply is generated using 5-, 12- or 24-V DC input from the backplane. Power supplies are (...)
原理图: PDF
封装 引脚 CAD 符号、封装和 3D 模型
HSOIC (DDA) 8 Ultra Librarian
SOIC (D) 8 Ultra Librarian
应遵守 TI 评估类商品的标准条款与条件。

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

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