TPS54425
- D-CAP2™ Mode Enables Fast Transient Response
- Low Output Ripple and Allows Ceramic Output Capacitor
- Wide VIN Input Voltage Range: 4.5 V to 18 V
- Output Voltage Range: 0.76 V to 5.5 V
- Highly Efficient Integrated FET’s Optimized
for Lower Duty Cycle Applications
– 65 mΩ (High Side) and 55 mΩ (Low Side) - High Efficiency, less than 10 µA at shutdown
- High Initial Bandgap Reference Accuracy
- Adjustable Soft Start
- Pre-Biased Soft Start
- 700-kHz Switching Frequency (fSW)
- Cycle By Cycle Over Current Limit
- Power Good Output
- APPLICATIONS
- Wide Range of Applications for Low Voltage System
- Digital TV Power Supply
- High Definition Blu-ray Disc Players
- Networking Home Terminal
- Digital Set Top Box (STB)
- Wide Range of Applications for Low Voltage System
The TPS54425 is an adaptive on-time D-CAP2™ mode synchronous buck converter. The TPS54425 enables system designers to complete the suite of various end equipment’s power bus regulators with a cost effective, low component count, low standby current solution. The main control loop for the TPS54425 uses the D-CAP2 mode control which provides a very fast transient response with no external compensation components. The TPS54425 also has a proprietary circuit that enables the device to adopt to both low equivalent series resistance (ESR) output capacitors, such as POSCAP or SP-CAP, and ultra-low ESR ceramic capacitors. The device operates from 4.5-V to 18-V VIN input. The output voltage can be programmed between 0.76 V and 5.5 V. The device also features an adjustable soft start time and a power good function. The TPS54425 is available in the 14-pin HTSSOP package, and designed to operate from –40°C to 85°C.
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功能与比较器件相同,且具有相同引脚
技术文档
类型 | 标题 | 下载最新的英语版本 | 日期 | |||
---|---|---|---|---|---|---|
* | 数据表 | 4-A Output Single Synchronous Step Down Switcher With Integrated FET (SWIFT) 数据表 (Rev. C) | 2011年 7月 25日 | |||
用户指南 | TPS54425 Step-Down Converter Evaluation Module User's Guide (Rev. A) | PDF | HTML | 2021年 9月 2日 | |||
应用手册 | 基于带有纹波注入谷底检测定导通时间频域分析的D-CAP2™频率响应模型 | 英语版 | 2015年 9月 2日 | |||
设计指南 | 适用于 Xilinx FPGA 的模拟器件 解决方案指南 | 2012年 4月 24日 | ||||
应用手册 | Understanding Thermal Dissipation and Design of a Heatsink | 2011年 5月 4日 |
设计和开发
如需其他信息或资源,请点击以下任一标题进入详情页面查看(如有)。
TPS54425EVM-608 — 用于 TPS54425 4.5V 至 18V 输入、4A 同步降压转换器的评估模块
TPS54425 Unencrypted PSpice Transient Model Package (Rev. A)
TIDA-010011 — 适用于保护继电器处理器模块的高效电源架构参考设计
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
HTSSOP (PWP) | 14 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点