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线性和低压降 (LDO) 稳压器

TPS75233-EP

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快速瞬态响应稳压器（增强型米6体育平台手机版_好二三四）

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TPS75233-EP

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米6体育平台手机版_好二三四详情

Output options Fixed Output Iout (max) (A) 2 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 3.3 Vout (min) (V) 3.3 Fixed output options (V) 3.3 Rating HiRel Enhanced Product Noise (µVrms) 60 PSRR at 100 KHz (dB) 16 Iq (typ) (mA) 0.07 Thermal resistance θJA (°C/W) 57.9 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 210 Operating temperature range (°C) -40 to 125
Output options Fixed Output Iout (max) (A) 2 Vin (max) (V) 5.5 Vin (min) (V) 2.7 Vout (max) (V) 3.3 Vout (min) (V) 3.3 Fixed output options (V) 3.3 Rating HiRel Enhanced Product Noise (µVrms) 60 PSRR at 100 KHz (dB) 16 Iq (typ) (mA) 0.07 Thermal resistance θJA (°C/W) 57.9 Load capacitance (min) (µF) 47 Regulated outputs (#) 1 Features Enable, Power good Accuracy (%) 2 Dropout voltage (Vdo) (typ) (mV) 210 Operating temperature range (°C) -40 to 125
HTSSOP (PWP) 20 41.6 mm² 6.5 x 6.4
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-A Low-Dropout Voltage Regulator
  • Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed Output and Adjustable Versions
  • Open Drain Power-On Reset With 100-ms Delay (TPS752xx)
  • Open Drain Power-Good (PG) Status Output (TPS754xx)
  • Dropout Voltage Typically 210 mV at 2 A (TPS75233)
  • Ultralow 75-µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP (PWP) PowerPAD™ Package
  • Thermal Shutdown Protection

PowerPAD is a trademark of Texas Instruments.
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over the specified temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.
  • Controlled Baseline
    • One Assembly/Test Site, One Fabrication Site
  • Enhanced Diminishing Manufacturing Sources (DMS) Support
  • Enhanced Product-Change Notification
  • Qualification Pedigree
  • 2-A Low-Dropout Voltage Regulator
  • Available in 1.5-V, 1.8-V, 2.5-V, 3.3-V Fixed Output and Adjustable Versions
  • Open Drain Power-On Reset With 100-ms Delay (TPS752xx)
  • Open Drain Power-Good (PG) Status Output (TPS754xx)
  • Dropout Voltage Typically 210 mV at 2 A (TPS75233)
  • Ultralow 75-µA Typical Quiescent Current
  • Fast Transient Response
  • 2% Tolerance Over Specified Conditions for Fixed-Output Versions
  • 20-Pin TSSOP (PWP) PowerPAD™ Package
  • Thermal Shutdown Protection

PowerPAD is a trademark of Texas Instruments.
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over the specified temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits.

The TPS752xx and TPS754xx are low dropout regulators with integrated power-on reset and power good (PG) functions respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233, TPS75433). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS752xx and TPS754xx are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 210 mV at an output current of 2 A for the TPS75x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when the EN\ pin is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.

The RESET\ (SVS, POR, or power on reset) output of the TPS752xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.

The TPS754xx has a power good terminal (PG) as an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS752xx or the TPS754xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xx and the TPS754xx families are available in 20 pin TSSOP (PWP) packages.

The TPS752xx and TPS754xx are low dropout regulators with integrated power-on reset and power good (PG) functions respectively. These devices are capable of supplying 2 A of output current with a dropout of 210 mV (TPS75233, TPS75433). Quiescent current is 75 µA at full load and drops down to 1 µA when the device is disabled. TPS752xx and TPS754xx are designed to have fast transient response for larger load current changes.

Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 210 mV at an output current of 2 A for the TPS75x33) and is directly proportional to the output current. Additionally, since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output loading (typically 75 µA over the full range of output current, 1 mA to 2 A). These two key specifications yield a significant improvement in operating life for battery-powered systems.

The device is enabled when the EN\ pin is connected to a low-level input voltage. This LDO family also features a sleep mode; applying a TTL high signal to EN\ (enable) shuts down the regulator, reducing the quiescent current to 1 µA at TJ = 25°C.

The RESET\ (SVS, POR, or power on reset) output of the TPS752xx initiates a reset in microcomputer and microprocessor systems in the event of an undervoltage condition. An internal comparator in the TPS752xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When the output reaches 95% of its regulated voltage, RESET\ goes to a high-impedance state after a 100-ms delay. RESET\ goes to a logic-low state when the regulated output voltage is pulled below 95% (i.e., over load condition) of its regulated voltage.

The TPS754xx has a power good terminal (PG) as an active high, open drain output, which can be used to implement a power-on reset or a low-battery indicator.

The TPS752xx or the TPS754xx are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xx and the TPS754xx families are available in 20 pin TSSOP (PWP) packages.
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类型 标题 下载最新的英语版本 日期
* 数据表 TPS752xx-EP w/Reset TPS754xx-EP w/Power Good Fast Trans Respon Volt Regulators 数据表 2003年 4月 29日
* 辐射与可靠性报告 TPS75233QPWPREP Reliability Report 2017年 11月 3日
应用手册 LDO 噪声揭秘 (Rev. B) PDF | HTML 英语版 (Rev.B) PDF | HTML 2020年 9月 16日
应用手册 LDO PSRR Measurement Simplified (Rev. A) PDF | HTML 2017年 8月 9日
应用手册 简化的 LDO PSRR 测量 最新英语版本 (Rev.A) PDF | HTML 2010年 7月 28日

设计和开发

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仿真模型

TPS75233-EP PSpice Transient Model

SGLM029.ZIP (48 KB) - PSpice Model
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仿真模型

TPS75233-EP Unencrypted PSpice Transient Model

SGLM030.ZIP (3 KB) - PSpice Model
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封装 引脚 CAD 符号、封装和 3D 模型
HTSSOP (PWP) 20 Ultra Librarian
应遵守 TI 评估类商品的标准条款与条件。

订购和质量

包含信息：
  • RoHS
  • REACH
  • 器件标识
  • 引脚镀层/焊球材料
  • MSL 等级/回流焊峰值温度
  • MTBF/时基故障估算
  • 材料成分
  • 鉴定摘要
  • 持续可靠性监测
包含信息：
  • 制造厂地点
  • 封装厂地点

支持和培训

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