TMS320DM365

Name: TMS320DM365
Brand: TI
SKU: TMS320DM365
Price: 10.155 USD

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DaVinci Digital Media Processor

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Data sheet

document-pdfAcrobat TMS320DM365 Digital Media System-on-Chip datasheet (Rev. E)

Errata

document-pdfAcrobat
TMS320DM365 Digital Media System-on-Chip Silicon Errata (Silicon Revs 1.1 & 1.2) (Rev. E)

TMS320DM365

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Data sheet

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Product details

DSP type

Operating system

Linux

Ethernet MAC

10/100

Rating

Catalog

Operating temperature range (°C)

-40 to 85

DSP type

Operating system

Linux

Ethernet MAC

10/100

Rating

Catalog

Operating temperature range (°C)

-40 to 85

NFBGA (ZCE)

338

169 mm² 13 x 13

Highlights
- High-Performance Digital Media System-on-Chip (DMSoC)
- Up to 300-MHz ARM926EJ-S Clock Rate
- Two Video Image Co-processors (HDVICP, MJCP) Engines
- Supports a Range of Encode, Decode, and Video Quality Operations
- Video Processing Subsystem
  - HW Face Detect Engine
  - Resize Engine from 1/16x to 8x
  - 16-Bit Parallel AFE (Analog Front-End) Interface Up to 120 MHz
  - 4:2:2 (8-/16-bit) Interface
  - 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
  - 3 DACs for HD Analog Video Output
  - Hardware On-Screen Display (OSD)
- Capable of 720p 30fps H.264 video processing
  Note: 216-MHz is only capable of D1 processing
- Peripherals include EMAC, USB 2.0 OTG, DDR2/NAND, 5 SPIs, 2 UARTs, 2 MMC/SD/SDIO, Key Scan
- 8 Different Boot Modes and Configurable Power-Saving Modes
- Pin-to-pin and software compatible with DM368
- Extended temperature (-40°C - 85°C) available for 300-Mhz device
- 3.3-V and 1.8-V I/O, 1.2-V/1.35-V Core
- 338-Pin Ball Grid Array at 65nm Process Technology
High-Performance Digital Media System-on-Chip (DMSoC)
- 216-, 270-, 300-MHz ARM926EJ-S Clock Rate
- Fully Software-Compatible With ARM9™
ARM926EJ-S™ Core
- Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
- DSP Instruction Extensions and Single Cycle MAC
- ARM® Jazelle® Technology
- EmbeddedICE-RT Logic for Real-Time Debug
ARM9 Memory Architecture
- 16K-Byte Instruction Cache
- 8K-Byte Data Cache
- 32K-Byte RAM
- 16K-Byte ROM
- Little Endian
Two Video Image Co-processors (HDVICP, MJCP) Engines
- Support a Range of Encode and Decode Operations
- H.264, MPEG4, MPEG2, MJPEG, JPEG, WMV9/VC1
Video Processing Subsystem
- Front End Provides:
  - HW Face Detect Engine
  - Hardware IPIPE for Real-Time Image Processing
    - Resize Engine
      - Resize Images From 1/16× to 8×
      - Separate Horizontal/Vertical Control
      - Two Simultaneous Output Paths
  - IPIPE Interface (IPIPEIF)
  - Image Sensor Interface (ISIF) and CMOS Imager Interface
  - 16-Bit Parallel AFE (Analog Front End) Interface Up to 120 MHz
  - Glueless Interface to Common Video Decoders
  - BT.601/BT.656/BT.1120 Digital YCbCr 4:2:2 (8-/16-Bit Module
  - Histogram Module
  - Lens distortion correction module (LDC)
  - Hardware 3A statistics collection module (H3A)
- Back End Provides:
  - Hardware On-Screen Display (OSD)
  - Composite NTSC/PAL video encoder output
  - 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
  - 3 DACs for HD Analog Video Output
  - LCD Controller
  - BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
Analog-to-Digital Convertor (ADC)
Power Management and Real Time Clock Subsystem (PRTCSS)
- Real Time Clock
16-Bit Host-Port Interface (HPI)
10/100 Mb/s Ethernet Media Access Controller (EMAC) - Digital Media
- IEEE 802.3 Compliant
- Supports Media Independent Interface (MII)
- Management Data I/O (MDIO) Module
Key Scan
Voice Codec
External Memory Interfaces (EMIFs)
- DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
- Asynchronous16-/8-bit Wide EMIF (AEMIF)
  - Flash Memory Interfaces
    - NAND (8-/16-bit Wide Data)
    - 16 MB NOR Flash, SRAM
    - OneNAND(16-bit Wide Data)
Flash Card Interfaces
- Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
- SmartMedia/xD
Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
USB port with Integrated 2.0 High-Speed PHY that Supports
- USB 2.0 High-Speed Device
- USB 2.0 High-Speed Host (mini-host, supporting one external device)
- USB On The Go (HS-USB OTG)
Four 64-Bit General-Purpose Timers (each configurable as two 32-bit timers)
One 64-Bit Watch Dog Timer
Two UARTs (One fast UART with RTS and CTS Flow Control)
Five Serial Port Interfaces (SPI) each with two Chip-Selects
One Master/Slave Inter-Integrated Circuit (I²C) Bus™
One Multi-Channel Buffered Serial Port (McBSP)
- I2S
- AC97 Audio Codec Interface
- S/PDIF via Software
- Standard Voice Codec Interface (AIC12)
- SPI Protocol (Master Mode Only)
- Direct Interface to T1/E1 Framers
- Time Division Multiplexed Mode (TDM)
- 128 Channel Mode
Four Pulse Width Modulator (PWM) Outputs
Four RTO (Real Time Out) Outputs
Up to 104 General-Purpose I/O (GPIO) Pins (Multiplexed with Other Device Functions)
Boot Modes
- On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, UART, USB, SPI, EMAC, or HPI
- AEMIF (NOR and OneNAND)
Configurable Power-Saving Modes
Crystal or External Clock Input (typically 19.2 Mhz, 24 MHz, 27 Mhz or 36 MHz)
Flexible PLL Clock Generators
Debug Interface Support
- IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
- ETB (Embedded Trace Buffer) with 4K-Bytes Trace Buffer memory
- Device Revision ID Readable by ARM
338-Pin Ball Grid Array (BGA) Package (ZCE Suffix), 0.65-mm Ball Pitch
65nm Process Technology
3.3-V and 1.8-V I/O, 1.2-V/ 1.35-V Internal
Community Reesources
- TI E2E Community
- TI Embedded Processors Wiki

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this document.

Windows is a trademark of Microsoft.

All other trademarks are the property of their respective owners.

Highlights
- High-Performance Digital Media System-on-Chip (DMSoC)
- Up to 300-MHz ARM926EJ-S Clock Rate
- Two Video Image Co-processors (HDVICP, MJCP) Engines
- Supports a Range of Encode, Decode, and Video Quality Operations
- Video Processing Subsystem
  - HW Face Detect Engine
  - Resize Engine from 1/16x to 8x
  - 16-Bit Parallel AFE (Analog Front-End) Interface Up to 120 MHz
  - 4:2:2 (8-/16-bit) Interface
  - 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
  - 3 DACs for HD Analog Video Output
  - Hardware On-Screen Display (OSD)
- Capable of 720p 30fps H.264 video processing
  Note: 216-MHz is only capable of D1 processing
- Peripherals include EMAC, USB 2.0 OTG, DDR2/NAND, 5 SPIs, 2 UARTs, 2 MMC/SD/SDIO, Key Scan
- 8 Different Boot Modes and Configurable Power-Saving Modes
- Pin-to-pin and software compatible with DM368
- Extended temperature (-40°C - 85°C) available for 300-Mhz device
- 3.3-V and 1.8-V I/O, 1.2-V/1.35-V Core
- 338-Pin Ball Grid Array at 65nm Process Technology
High-Performance Digital Media System-on-Chip (DMSoC)
- 216-, 270-, 300-MHz ARM926EJ-S Clock Rate
- Fully Software-Compatible With ARM9™
ARM926EJ-S™ Core
- Support for 32-Bit and 16-Bit (Thumb® Mode) Instruction Sets
- DSP Instruction Extensions and Single Cycle MAC
- ARM® Jazelle® Technology
- EmbeddedICE-RT Logic for Real-Time Debug
ARM9 Memory Architecture
- 16K-Byte Instruction Cache
- 8K-Byte Data Cache
- 32K-Byte RAM
- 16K-Byte ROM
- Little Endian
Two Video Image Co-processors (HDVICP, MJCP) Engines
- Support a Range of Encode and Decode Operations
- H.264, MPEG4, MPEG2, MJPEG, JPEG, WMV9/VC1
Video Processing Subsystem
- Front End Provides:
  - HW Face Detect Engine
  - Hardware IPIPE for Real-Time Image Processing
    - Resize Engine
      - Resize Images From 1/16× to 8×
      - Separate Horizontal/Vertical Control
      - Two Simultaneous Output Paths
  - IPIPE Interface (IPIPEIF)
  - Image Sensor Interface (ISIF) and CMOS Imager Interface
  - 16-Bit Parallel AFE (Analog Front End) Interface Up to 120 MHz
  - Glueless Interface to Common Video Decoders
  - BT.601/BT.656/BT.1120 Digital YCbCr 4:2:2 (8-/16-Bit Module
  - Histogram Module
  - Lens distortion correction module (LDC)
  - Hardware 3A statistics collection module (H3A)
- Back End Provides:
  - Hardware On-Screen Display (OSD)
  - Composite NTSC/PAL video encoder output
  - 8-/16-bit YCC and Up to 24-Bit RGB888 Digital Output
  - 3 DACs for HD Analog Video Output
  - LCD Controller
  - BT.601/BT.656 Digital YCbCr 4:2:2 (8-/16-Bit) Interface
Analog-to-Digital Convertor (ADC)
Power Management and Real Time Clock Subsystem (PRTCSS)
- Real Time Clock
16-Bit Host-Port Interface (HPI)
10/100 Mb/s Ethernet Media Access Controller (EMAC) - Digital Media
- IEEE 802.3 Compliant
- Supports Media Independent Interface (MII)
- Management Data I/O (MDIO) Module
Key Scan
Voice Codec
External Memory Interfaces (EMIFs)
- DDR2 and mDDR SDRAM 16-bit wide EMIF With 256 MByte Address Space (1.8-V I/O)
- Asynchronous16-/8-bit Wide EMIF (AEMIF)
  - Flash Memory Interfaces
    - NAND (8-/16-bit Wide Data)
    - 16 MB NOR Flash, SRAM
    - OneNAND(16-bit Wide Data)
Flash Card Interfaces
- Two Multimedia Card (MMC) / Secure Digital (SD/SDIO)
- SmartMedia/xD
Enhanced Direct-Memory-Access (EDMA) Controller (64 Independent Channels)
USB port with Integrated 2.0 High-Speed PHY that Supports
- USB 2.0 High-Speed Device
- USB 2.0 High-Speed Host (mini-host, supporting one external device)
- USB On The Go (HS-USB OTG)
Four 64-Bit General-Purpose Timers (each configurable as two 32-bit timers)
One 64-Bit Watch Dog Timer
Two UARTs (One fast UART with RTS and CTS Flow Control)
Five Serial Port Interfaces (SPI) each with two Chip-Selects
One Master/Slave Inter-Integrated Circuit (I²C) Bus™
One Multi-Channel Buffered Serial Port (McBSP)
- I2S
- AC97 Audio Codec Interface
- S/PDIF via Software
- Standard Voice Codec Interface (AIC12)
- SPI Protocol (Master Mode Only)
- Direct Interface to T1/E1 Framers
- Time Division Multiplexed Mode (TDM)
- 128 Channel Mode
Four Pulse Width Modulator (PWM) Outputs
Four RTO (Real Time Out) Outputs
Up to 104 General-Purpose I/O (GPIO) Pins (Multiplexed with Other Device Functions)
Boot Modes
- On-Chip ARM ROM Bootloader (RBL) to Boot From NAND Flash, MMC/SD, UART, USB, SPI, EMAC, or HPI
- AEMIF (NOR and OneNAND)
Configurable Power-Saving Modes
Crystal or External Clock Input (typically 19.2 Mhz, 24 MHz, 27 Mhz or 36 MHz)
Flexible PLL Clock Generators
Debug Interface Support
- IEEE-1149.1 (JTAG™) Boundary-Scan-Compatible
- ETB (Embedded Trace Buffer) with 4K-Bytes Trace Buffer memory
- Device Revision ID Readable by ARM
338-Pin Ball Grid Array (BGA) Package (ZCE Suffix), 0.65-mm Ball Pitch
65nm Process Technology
3.3-V and 1.8-V I/O, 1.2-V/ 1.35-V Internal
Community Reesources
- TI E2E Community
- TI Embedded Processors Wiki

Developers can now deliver pixel-perfect images at up to 720p H.264 at 30fps in their digital video designs without concerns of video format support, constrained network bandwidth, limited system storage capacity or cost with the new TMS320DM365 digital media processor based on DaVinci technology from Texas Instruments Incorporated (TI). With multi-format HD video, the DM365 also features a suite of peripherals saving developers on system costs.

This ARM9-based DM365 device offers speeds up to 300 MHz and supports production-qualified H.264, MPEG-4, MPEG-2, MJPEG and VC1/WMV9 codecs providing customers with the flexibility to select the right video codec for their application. These codecs are driven from video accelerators offloading compression needs from the ARM core so that developers can utilize the most performance from the ARM for their application. Video surveillance designers achieve greater compression efficiency providing more storage without straining the network bandwidth. Developers of media playback and camera-driven applications, such as video doorbells, digital signage, digital video recorders, portable media players and more can ensure interoperability as well as product scalability by taking advantage of the full suite of codecs supported on the DM365.

Along with multi-format HD video, the DM365 enables seamless interface to most additional external devices required for video applications. The image sensor interface is flexible enough to support CCD, CMOS, and various other interfaces such as BT.656, BT1120. The DM365 also offers a high level of integration with HD display support including, 3 built-in 10-bit HD Analog Video Digital to Analog Converters (DACs), DDR2/mDDR, Ethernet MAC, USB 2.0, integrated audio, Host Port Interface (HPI), Analog to Digital Converter, and many more features saving developers on overall system costs as well as real estate on their circuit boards allowing for a slimmer, sleeker design.

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Support through a third party

This product does not have ongoing direct design support from TI. For support while working through your design, you may contact one of the following third parties: D3 Engineering, elnfochips, Ittiam Systems, Path Partner Technology, or Z3 Technologies.

Technical documentation

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	Type	Title		Date
*	Data sheet	TMS320DM365 Digital Media System-on-Chip datasheet (Rev. E)		01 Jul 2011
*	Errata	TMS320DM365 Digital Media System-on-Chip Silicon Errata (Silicon Revs 1.1 & 1.2) (Rev. E)		11 Jul 2011
	Application note	High-Speed Interface Layout Guidelines (Rev. J)	PDF \| HTML	24 Feb 2023
	User guide	SYS/BIOS (TI-RTOS Kernel) User's Guide (Rev. V)		01 Jun 2020
	User guide	TMS320DM36x DaVinci™ Video Processing Front End (VPFE) User's Guide (Rev. C)		30 Jun 2016
	Application note	Powering the TMS320DM365 using the TPS650061		10 May 2012
	User guide	TMS320DM36x DMSoC Power Management and Real-Time Clock Subsystem User's Guide (Rev. B)		03 Aug 2011
	Application note	Migrating From TMS320DM35x to TMS320DM36x Devices (Rev. A)		02 Jun 2011
	User guide	TMS320DM36x DMSoC General-Purpose Input/Output User's Guide (Rev. C)		19 Jan 2011
	User guide	TMS320DM36x DMSoC Ethernet Media Access Controller (EMAC) User's Guide (Rev. B)		23 Dec 2010
	User guide	TMS320DM36x DMSoC Video Processing Front End User's Guide (Rev. C)		12 Nov 2010
	User guide	TMS320DM36x DMSoC Video Processing Back End User's Guide (Rev. C)		26 Aug 2010
	User guide	TMS320DM36x DMSoC Voice Codec User's Guide (Rev. B)		30 Jul 2010
	User guide	TMS320DM36x DMSoC Face Detection User's Guide (Rev. A)		21 Jul 2010
	Application note	Application Parameter Settings for TMS320DM365 H.264 Encoder		29 Apr 2010
	User guide	TMS320DM36x DMSoC Asynchronous External Memory Interface User's Guide (Rev. C)		23 Apr 2010
	User guide	TMS320DM36x DMSoC Multimedia Card/Secure Digital Card Controller User's Guide (Rev. B)		23 Apr 2010
	Application note	Migrating from TMS320DM365 to TMS320DM368		11 Apr 2010
	More literature	TMS320DM3x DaVinci Video Processors		11 Apr 2010
	User guide	TMS320DM36x DMSoC Key Scan User's Guide (Rev. A)		01 Mar 2010
	User guide	TMS320DM36x DMSoC Serial Peripheral Interface User's Guide (Rev. B)		01 Mar 2010
	Application note	Smart Codec Features in TMS320DM365		09 Dec 2009
	Application note	TMS320DM365 Preview of Codec Porting on Linux		04 Dec 2009
	Application note	Understanding H.264 Decoder Buffer Mechanism for TMS320DM365		04 Dec 2009
	Application note	High-Efficiency Power Solution Using DC/DC Converter for the DM365 (Rev. A)		11 Sep 2009
	Application note	Simple Power Solution Using LDOs for the DM365 (Rev. A)		11 Sep 2009
	Application note	High Integration, High Efficiency Power Solution using DCDC Converters for DM365 (Rev. A)		11 Sep 2009
	Application note	TMS320DM36x Power Consumption Summary		10 Sep 2009
	User guide	TMS320DM36x DMSoC Universal Host Port Interface User's Guide (Rev. A)		09 Aug 2009
	User guide	TMS320DM36x DMSoC ARM Subsystem Reference Guide (Rev. A)		07 Aug 2009
	User guide	TMS320DM36x DMSoC Inter-Integrated Circuit User's Guide (Rev. A)		07 Aug 2009
	User guide	TMS320DM36x DMSoC Multichannel Buffered Serial Port User's Guide (Rev. A)		07 Aug 2009
	User guide	TMS320DM36x DMSoC Universal Serial Bus User's Guide (Rev. A)		07 Aug 2009
	Application note	High Integration, High Efficiency Power Solution using DCDC Converters for DM365		04 Aug 2009
	Application note	High-Vin, High-Efficiency Power Solution Using DC/DC Converter for the DM365		04 Aug 2009
	Application note	Simple Power Solution Using LDOs for the DM365		04 Aug 2009
	Application note	TMS320DM36x SoC Architecture and Throughput		29 Jul 2009
	Application note	LSP 2.10 DaVinci Linux Drivers (Rev. A)		08 Jul 2009
	More literature	Complimentary Analog Devices for DM365 Digital Media Processor		03 Mar 2009
	User guide	TMS320DM36x DMSoC Analog to Digital Converter User's Guide		03 Mar 2009
	User guide	TMS320DM36x DMSoC DDR2/mDDR Memory Controller User's Guide		03 Mar 2009
	User guide	TMS320DM36x DMSoC Enhanced Direct Memory Access Controller User's Guide		03 Mar 2009
	User guide	TMS320DM36x DMSoC Pulse-Width Modulator User's Guide		03 Mar 2009
	User guide	TMS320DM36x DMSoC Real Time Out User's Guide		03 Mar 2009
	User guide	TMS320DM36x DMSoC Timer/Watchdog Timer User's Guide		03 Mar 2009
	User guide	TMS320DM36x DMSoC Universal Asynchronous Receiver/Transmitter User's Guide		03 Mar 2009
	Application note	Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)		17 Jul 2008

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

TMDXEVM368 — TMS320DM36x Evaluation Module

The TMS320DM36x Digital Video Evaluation Module (DVEVM) enables developers to start immediate evaluation of TI’s Digital Media (DMx) processors and begin building digital video applications such as IP security cameras, action cameras, drones, wearables, digital signage, video doorbells, and (...)

User guide: PDF

Not available on TI.com

Debug probe

TMDSEMU200-U — XDS200 USB Debug Probe

The XDS200 is a debug probe (emulator) used for debugging TI embedded devices. The XDS200 features a balance of low cost with good performance as compared to the low cost XDS110 and the high performance XDS560v2. It supports a wide variety of standards (IEEE1149.1, IEEE1149.7, SWD) in a (...)

Not available on TI.com

Debug probe

TMDSEMU560V2STM-U — XDS560™ software v2 system trace USB debug probe

The XDS560v2 is the highest performance of the XDS560™ family of debug probes and supports both the traditional JTAG standard (IEEE1149.1) and cJTAG (IEEE1149.7). Note that it does not support serial wire debug (SWD).

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com

Debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

All XDS debug probes support Core and System Trace in all ARM and DSP processors (...)

Not available on TI.com

Software development kit (SDK)

LINUXDVSDK-DM36X — Linux Digital Video Software Development Kit (DVSDK) for DM365, DM368 Digital Media Processors

The Linux™ Digital Video Software Development Kits (DVSDKs) enable DaVinci™ system integrators to quickly develop Linux-based multimedia applications that can be easily ported across different devices in the DaVinci platform. Each DVSDK combines a pre-tested set of operating system, application (...)

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Software codec

DM365CODECS — Codecs for DM36x (DM365, DM368) - Software and Documentation

TI codecs are free, come with production licensing and are available for download now. All are production-tested for easy integration into audio, video and voice applications. Click GET SOFTWARE button (above) to access the most recent, tested codec versions available. Datasheets and Release Notes (...)

Supported products & hardware

Products

Digital signal processors (DSPs)

TMS320DM365 — DaVinci Digital Media Processor

TMS320DM368 — DaVinci Digital Media Processor

Download options

Simulation model

DM365 ZCE BSDL Model

SPRM363.ZIP (9 KB) - BSDL Model

Download

Simulation model

DM365 ZCE IBIS Model (Rev. C)

SPRM354C.ZIP (502 KB) - IBIS Model

Download

Package	Pins	CAD symbols, footprints & 3D models
NFBGA (ZCE)	338	Ultra Librarian

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Ordering & quality

Information included:

RoHS
REACH
Device marking
Lead finish/Ball material
MSL rating/Peak reflow
MTBF/FIT estimates
Material content
Qualification summary
Ongoing reliability monitoring

Information included:

Fab location
Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

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Video series

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TMS320DM365

DaVinci Digital Media Processor

TMS320DM365

Product details

Support through a third party

Technical documentation

Design & development

TMDXEVM368 — TMS320DM36x Evaluation Module

TMDSEMU200-U — XDS200 USB Debug Probe

TMDSEMU560V2STM-U — XDS560™ software v2 system trace USB debug probe

TMDSEMU560V2STM-UE — XDS560v2 System Trace USB & Ethernet Debug Probe

LINUXDVSDK-DM36X — Linux Digital Video Software Development Kit (DVSDK) for DM365, DM368 Digital Media Processors

DM365CODECS — Codecs for DM36x (DM365, DM368) - Software and Documentation

Supported products & hardware

Products

Digital signal processors (DSPs)

DM365 ZCE BSDL Model

DM365 ZCE IBIS Model (Rev. C)

Ordering & quality

Support & training

TI E2E™ forums with technical support from TI engineers

Video series

Videos

Download options

DM365CODECS — Codecs for DM36x (DM365, DM368) - Software and Documentation

Digital signal processors (DSPs)

Documentation

Release Information