AFE7900
4-transmit, 6-receive RF-sampling transceiver, 5-MHz to 7.4-GHz, max 1200-MHz IBW
AFE7900
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- Quad RF sampling 12-GSPS transmit DACs
- Quad RF sampling 3-GSPS receive ADCs
- Dual RF sampling 3-GSPS feedback (auxilliary RX) ADCs
- Maximum RF signal bandwidth:
- 4TX or 2FB: 1200 MHz or 2TX: 2400 MHz
- RX): 1200 MHz (no FB), 600 MHz (with FB)
- RF frequency range:
- TX: 5MHz - 7.4GHz
- RX/FB: 5MHz - 7.4GHz
- Digital step attenuators (DSA):
- TX: 40 dB range, 0.125-dB steps
- RX or FB: 25 dB range, 0.5-dB steps
- Single or dual-band DUC or DDCs for TX and RX
- 16x NCOs per TX or RX and FB
- Optional Internal PLL or VCO for DAC or ADC clocks or external clock at DAC or ADC sample rate
- Sysref Alignment Detector
- SerDes data interface:
- JESD204B and JESD204C compatible
- 8 SerDes transceivers up to 29.5 Gbps
- Subclass 1 multi-device synchronization
- Package: 17-mm × 17-mm FCBGA, 0.8-mm pitch
The AFE7900 is a high performance, wide bandwidth multi-channel transceiver, integrating four RF sampling transmitter chains, four RF sampling receiver chains and two RF sampling feedback chains (six RF sampling ADCs total). With operation up to 7.4 GHz, this device enables direct RF sampling in the L, S and C-band frequency ranges without the need for additional frequency conversions stages. This improvement in density and flexibility enables high-channel-count, multi-mission systems.
The TX signal paths support interpolation and digital up conversion options that deliver up to 1200 MHz of signal bandwidth for four TX or 2400 MHz for two TX. The output of the DUCs drives a 12-GSPS DAC (digital to analog converter) with a mixed mode output option to enhance 2nd Nyquist operation. The DAC output includes a variable gain amplifier (TX DSA) with 40-dB range and 1-dB analog and 0.125-dB digital steps.
Each receiver chain includes a 25-dB range DSA (Digital Step Attenuator), followed by a 3-GSPS ADC (analog-to-digital converter). Each receiver channel has an analog peak power detector and various digital power detectors to assist an external or internal autonomous automatic gain controller, and RF overload detectors for device reliability protection. Flexible decimation options provide optimization of data bandwidth up to 1200 MHz for four RX without FB paths or 600 MHz with two FB paths (1200 MHz BW each).
The device contains a SYSREF timing detector to allow optimization of the SYSREF input timing relative to the device clock.
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Technical documentation
Type | Title | Date | ||
---|---|---|---|---|
* | Data sheet | AFE7900 4T6R RF Sampling AFE with 12 GSPS DACs and 3 GSPS ADCs datasheet (Rev. B) | PDF | HTML | 30 Jun 2023 |
User guide | AFE79xx SPI Bringup Guide With Xilinx FPGAs (Rev. A) | PDF | HTML | 05 May 2024 | |
Application note | AFE79xx as Single Chip Wideband Repeater Solution (Rev. A) | PDF | HTML | 30 May 2023 | |
Application note | Determining Optimal Receive Buffer Delay in JESD204B and JESD204C Receivers | PDF | HTML | 07 Jul 2022 | |
Certificate | AFE7900EVM EU RoHS Declaration of Conformity (DoC) | 03 Jun 2021 | ||
Application note | How to Achieve Frequency Hopping with the AFE79xx | 02 Jul 2020 |
Design & development
For additional terms or required resources, click any title below to view the detail page where available.
AFE7900EVM — AFE7900 evaluation module for four-transmit, six-receive, 5-MHz to 7400-MHz, RF-sampling AFE
The AFE7900 evaluation module (EVM) is an RF-sampling transceiver platform that can be configured to support up to four-transmit, four-receive, and two-feedback (4T4R+2FB) channels simultaneously.
The module evaluates the AFE7900, which is a quad-channel RF-sampling analog front end (AFE) with (...)
TI204C-IP — Request for JESD204 rapid design IP
The JESD204 rapid design IP has been designed to enable FPGA engineers to achieve an accelerated path to a working JESD204 system. The IP has been architected in a way that downstream digital processing and other application logic are isolated from most of the performance- and timing-critical (...)
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
High-speed ADCs (≥10 MSPS)
DATACONVERTERPRO-SW — High Speed Data Converter Pro GUI Installer, v5.20
This high-speed data converter pro GUI is a PC (Windows® XP/7/10 compatible) program designed to aid in evaluation of most TI high-speed data converter [analog-to-digital converter (ADC) and digital-to-analog converter (DAC)] and analog front-end (AFE) platforms. Designed to support the entire (...)
Supported products & hardware
Products
High-speed DACs (>10 MSPS)
Transmitters
High-speed ADCs (≥10 MSPS)
Ultrasound AFEs
Hardware development
Evaluation board
Software
Support software
TIDA-010230 — Multi-channel RF transceiver, low-noise clocking reference design for radar and EW applications
Package | Pins | CAD symbols, footprints & 3D models |
---|---|---|
FCBGA (ABJ) | 400 | Ultra Librarian |
FCBGA (ALK) | 400 | Ultra Librarian |
Ordering & quality
- RoHS
- REACH
- Device marking
- Lead finish/Ball material
- MSL rating/Peak reflow
- MTBF/FIT estimates
- Material content
- Qualification summary
- Ongoing reliability monitoring
- Fab location
- Assembly location
Recommended products may have parameters, evaluation modules or reference designs related to this TI product.
Support & training
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