ADS61B49
- Integrated High Impedance Analog Input Buffer
- Maximum Sample Rate: 250 MSPS
- 14-Bit Resolution — ADS61B49
- 12-Bit Resolution — ADS61B29
- 790 mW Total Power Dissipation at 250 MSPS
- Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
- Programmable Fine Gain up to 6 dB for SNR/SFDR Trade-Off and 1-Vpp Full-Scale Operation
- DC Offset Correction
- Supports Input Clock Amplitude Down to 400 mVPP Differential
- 48-QFN Package (7mm × 7mm)
- Pin Compatible with ADS6149 Family
- APPLICATIONS
- Multicarrier, Wide Bandwidth Communications
- Wireless Multi-Carrier Communications Infrastructure
- Software Defined Radio
- Power Amplifier Linearization Feedback ADC
- 802.16d/e
- Test and Measurement Instrumentation
- High Definition Video
- Medical Imaging
- Radar Systems
The ADS61B49 (ADS61B29) is a 14-bit (12-bit) A/D converter with a sampling rate up to 250 MSPS. It combines high dynamic performance and low power consumption in a compact 48-QFN package. An integrated analog buffer makes it well-suited for multi-carrier, wide bandwidth communications applications. The buffer maintains constant performance and input impedance across a wide frequency range.
The ADS61B49 (ADS61B29) has fine gain options that can be used to improve SFDR performance at lower full-scale input ranges. It includes a dc offset correction loop that can be used to cancel the ADC offset. Both Double Data Rate (DDR) LVDS and parallel CMOS digital output interfaces are available. At lower sampling rates, the ADC automatically operates at scaled down power with no loss in performance.
It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. The device is specified over the industrial temperature range (-40°C to 85°C).
技术文档
设计和开发
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SBAC120 — TIGAR Support Files
支持的米6体育平台手机版_好二三四和硬件
米6体育平台手机版_好二三四
接收器
高速 ADC (≥10MSPS)
硬件开发
评估板
ANALOG-ENGINEER-CALC — PC software analog engineer's calculator
The analog engineer’s calculator is designed to speed up many of the repetitive calculations that analog circuit design engineers use on a regular basis. This PC-based tool provides a graphical interface with a list of various common calculations ranging from setting operational-amplifier (...)
支持的米6体育平台手机版_好二三四和硬件
米6体育平台手机版_好二三四
精密运算放大器 (Vos<1mV)
通用运算放大器
音频运算放大器
跨阻放大器
高速运算放大器 (GBW ≥ 50MHz)
功率运算放大器
视频放大器
线路驱动器
跨导放大器和激光驱动器
全差分放大器
精密 ADC
生物传感 AFE
高速 ADC (≥10MSPS)
接收器
触摸屏控制器
差分放大器
仪表放大器
音频线路接收器
模拟电流检测放大器
数字功率监控器
配备集成型电流采样电阻的模拟电流检测放大器
配备集成型电流采样电阻的数字功率监控器
芯片与晶圆服务
JITTER-SNR-CALC — Jitter and SNR calculator
JITTER-SNR-CALC can be used for calculating theoretical Signal to Noise (SNR) performance of ADCs based on input frequency and clock jitter.
支持的米6体育平台手机版_好二三四和硬件
米6体育平台手机版_好二三四
高速 ADC (≥10MSPS)
精密 ADC
SBAC119 — TIGAR (Texas Instruments Graphical Evaluation of ADC Response Tool)
支持的米6体育平台手机版_好二三四和硬件
米6体育平台手机版_好二三四
接收器
高速 ADC (≥10MSPS)
硬件开发
评估板
PSPICE-FOR-TI — 适用于 TI 设计和模拟工具的 PSpice®
借助 PSpice for TI 的设计和仿真环境及其内置的模型库,您可对复杂的混合信号设计进行仿真。创建完整的终端设备设计和原型解决方案,然后再进行布局和制造,可缩短米6体育平台手机版_好二三四上市时间并降低开发成本。
在 PSpice for TI 设计和仿真工具中,您可以搜索 TI (...)
封装 | 引脚 | CAD 符号、封装和 3D 模型 |
---|---|---|
VQFN (RGZ) | 48 | Ultra Librarian |
订购和质量
- RoHS
- REACH
- 器件标识
- 引脚镀层/焊球材料
- MSL 等级/回流焊峰值温度
- MTBF/时基故障估算
- 材料成分
- 鉴定摘要
- 持续可靠性监测
- 制造厂地点
- 封装厂地点