SN74BCT8374A

Name: SN74BCT8374A
Brand: TI
SKU: SN74BCT8374A
Price: 4.729 USD

アクティブ

オクタル D タイプ・エッジ・トリガ・フリップ・フロップ搭載、スキャン・テスト・デバイス

ご注文はこちら

データシート

document-pdfAcrobat Scan Test Devices With Octal D-Type Edge-Triggered Flip-Flops データシート (Rev. E) (英語)

SN74BCT8374A

アクティブ

データシート

ご注文はこちら

製品詳細

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

8

IOL (max) (mA)

64

IOH (max) (mA)

-15

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Partial power down (Ioff), Very high speed (tpd 5-10ns)

Technology family

BCT

Rating

Catalog

Operating temperature range (°C)

0 to 70

Supply voltage (min) (V)

4.5

Supply voltage (max) (V)

5.5

Number of channels

8

IOL (max) (mA)

64

IOH (max) (mA)

-15

Input type

TTL-Compatible CMOS

Output type

3-State

Features

Partial power down (Ioff), Very high speed (tpd 5-10ns)

Technology family

BCT

Rating

Catalog

Operating temperature range (°C)

0 to 70

SOIC (DW)

24

159.65 mm² 15.5 x 10.3

Members of the Texas Instruments SCOPE^TM Family of Testability Products
Octal Test-Integrated Circuits
Functionally Equivalent to 'F374 and 'BCT374 in the Normal-Function Mode
Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
Test Operation Synchronous to Test Access Port (TAP)
Implement Optional Test Reset Signal by Recognizing a Double-High-Level Voltage (10 V) on TMS Pin
SCOPE^TM Instruction Set
- IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ
- Parallel-Signature Analysis at Inputs
- Pseudo-Random Pattern Generation From Outputs
- Sample Inputs/Toggle Outputs
Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
SCOPE is a trademark of Texas Instruments Incorporated.

Members of the Texas Instruments SCOPE^TM Family of Testability Products
Octal Test-Integrated Circuits
Functionally Equivalent to 'F374 and 'BCT374 in the Normal-Function Mode
Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
Test Operation Synchronous to Test Access Port (TAP)
Implement Optional Test Reset Signal by Recognizing a Double-High-Level Voltage (10 V) on TMS Pin
SCOPE^TM Instruction Set
- IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ
- Parallel-Signature Analysis at Inputs
- Pseudo-Random Pattern Generation From Outputs
- Sample Inputs/Toggle Outputs
Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs
SCOPE is a trademark of Texas Instruments Incorporated.

The 'BCT8374A scan test devices with octal edge-triggered D-type flip-flops are members of the Texas Instruments SCOPE^TM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are functionally equivalent to the 'F374 and 'BCT374 octal D-type flip-flops. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPE^TM octal flip-flops.

In the test mode, the normal operation of the SCOPE^TM octal flip-flops is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary-scan test operations as described in IEEE Standard 1149.1-1990.

Four dedicated test terminals control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

The SN54BCT8374A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT8374A is characterized for operation from 0°C to 70°C.

The 'BCT8374A scan test devices with octal edge-triggered D-type flip-flops are members of the Texas Instruments SCOPE^TM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are functionally equivalent to the 'F374 and 'BCT374 octal D-type flip-flops. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPE^TM octal flip-flops.

In the test mode, the normal operation of the SCOPE^TM octal flip-flops is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary-scan test operations as described in IEEE Standard 1149.1-1990.

Four dedicated test terminals control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

The SN54BCT8374A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT8374A is characterized for operation from 0°C to 70°C.

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